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ADNS-3530 датащи(PDF) 14 Page - Pixart Imaging Inc. |
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ADNS-3530 датащи(HTML) 14 Page - Pixart Imaging Inc. |
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14 / 25 page ![]() 14 During a read operation SCLK should be delayed at least tSRAD after the last address data bit to ensure that the ADNS-3530 has time to prepare the requested data. The falling edge of SCLK for the first address bit of either the read or write command must be at least tSRR or tSRW af- ter the last SCLK rising edge of the last data bit of the previous read operation. Burst Mode Operation Burst mode is a special serial port operation mode that may be used to reduce the serial transaction time for a motion read. The speed improvement is achieved by continuous data clocking from multiple registers with- out the need to specify the register address, and by not requiring the normal delay period between data bytes. Burst mode is activated by reading the Motion_Burst register. The ADNS-3530 will respond with the contents of the Motion, Delta_Y, Delta_X, SQUAL, Shutter_Upper, Shutter_Lower and Maximum_Pixel registers in that or- der. The burst transaction can be terminated after the first three bytes of the sequence are read by bringing the NCS pin high. After sending the register address, the microcontroller must wait tSRAD and then begin reading data. All data bits can be read with no delay between bytes by driving SCLK at the normal rate. The data is latched into the output buffer after the last address bit is received. After the burst transmission is complete, the microcontroller must raise the NCS line for at least tBEXIT to terminate burst mode. The serial port is not available for use until it is reset with NCS, even for a second burst transmission. Figure 18. Motion burst timing Notes on Power-Up The ADNS-3530 does not perform an internal power up self-reset; the POWER_UP_RESET register must be writ- ten every time power is applied. The appropriate se- quence is as follows: 1. Apply power 2. Drive NCS high, then low to reset the SPI port 3. Write 0x5a to register 0x3a 4. Read from registers 0x02, 0x03 and 0x04 (or read these same three bytes from burst motion register 0x42) one time regardless the state of the motion pin. During power-up there will be a period of time after the power supply is high but before any clocks are available. The table below shows the state of the various pins dur- ing power-up and reset. State of Signal Pins After VDD is Valid Pin On Power-Up NCS High Before Reset NCS Low Before Reset After Reset NCS Functional High Low Functional MISO Undefined Undefined Functional Depends on NCS SCLK Ignored Ignored Functional Depends on NCS MOSI Ignored Ignored Functional Depends on NCS XY_LED Undefined Undefined Undefined Functional MOTION Undefined Undefined Undefined Functional SHTDWN Must Be Low Must Be Low Must Be Low Functional MOTION_BURST REGISTER ADDRESS READ FIRST BYTE FIRST READ OPERATION READ SECOND BYTE READ THIRD BYTE SCLK tSRAD PixArt Imaging Inc. Low Power LED Integrated Slim Mouse Sensor All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw |
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