LMC660CM datasheet(2/22 Pages) TI1

2 / 22 page

LMC660

SNOSBZ3D – APRIL 1998 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

Differential Input Voltage

±Supply Voltage

Supply Voltage

16V

Output Short Circuit to V+

See(2)

Output Short Circuit to V−

See(3)

Lead Temperature

(Soldering, 10 sec.)

260°C

Storage Temp. Range

−65°C to +150°C

Voltage at Input/Output Pins

(V+) + 0.3V, (V−)

− 0.3V

Current at Output Pin

±18 mA

Current at Input Pin

±5 mA

Current at Power Supply Pin

35 mA

Power Dissipation

See(4)

Junction Temperature

150°C

ESD tolerance(5)

1000V

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test

conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.

(2)

Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.

(3)

Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or

multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30

mA over long term may adversely affect reliability.

(4)

The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient

temperature is PD = (TJ(MAX) − TA)/θJA.

(5)

Human Body Model is 1.5 k

Ω in series with 100 pF.

Operating Ratings

Temperature Range

LMC660AI

−40°C ≤ TJ ≤ +85°C

LMC660C

0°C

≤ TJ ≤ +70°C

Supply Voltage Range

4.75V to 15.5V

Power Dissipation

See(1)

Thermal Resistance (

θJA)

(2)

14-Pin SOIC

115°C/W

14-Pin PDIP

85°C/W

(1)

For operating at elevated temperatures the device must be derated based on the thermal resistance

θJA with PD = (TJ − TA)/θJA.

(2)

All numbers apply for packages soldered directly into a PC board.

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