VIN

VCC

OUT

RT

CS

GND

SS

COMP

1

2

3

4

8

7

6

5

LM5021

SNVS359D – MAY 2005 – REVISED MARCH 2013

www.ti.com

Connection Diagram

Figure 1. Top View

VSSOP-8

(See Package Number DGK0008A)

PDIP-8

(See Package Number P0008E)

PIN DESCRIPTIONS

Pin

Name

Description

Application Information

1

COMP

Control input for the Pulse Width Modulator and

COMP pull-up is provided by an internal 5K resistor which may

Hiccup comparators.

be used to bias an opto-coupler transistor.

2

VIN

Input voltage.

Input to start-up regulator. The VIN pin is clamped at 36V by

an internal zener diode.

3

VCC

Output only of a linear bias supply regulator.

VCC provides bias to controller and gate drive sections of the

Nominally 8.5V.

LM5021. An external capacitor must be connected from this pin

to ground.

4

OUT

MOSFET gate driver output.

High current output to the external MOSFET gate input with

source/sink current capability of 0.3A and 0.7A respectively.

5

GND

Ground return.

6

CS

Current Sense input.

Current sense input for current mode control and over-current

protection. Current limiting is accomplished using a dedicated

current sense comparator. If the CS comparator input exceeds

0.5 Volts the OUT pin switches low for cycle-by-cycle current

limit. CS is held low for 90ns after OUT switches high to blank

the leading edge current spike.

7

RT / SYNC

Oscillator timing resistor pin and synchronization

An external resistor connected from RT to GND sets the

input.

oscillator frequency. This pin will also accept synchronization

pulses from an external clock.

8

SS

Soft-start / Hiccup time

An external capacitor and an internal 22 µA current source set

the soft-start ramp. The soft -start capacitor controls both the

soft-start rate and the hiccup mode period.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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