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74AVC2T45DP датащи(PDF) 13 Page - NXP Semiconductors |
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74AVC2T45DP датащи(HTML) 13 Page - NXP Semiconductors |
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13 / 27 page ![]() 74AVC2T45 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 8 February 2013 13 of 27 NXP Semiconductors 74AVC2T45 Dual-bit, dual-supply voltage level translator/transceiver; 3-state [1] VCCI is the supply voltage associated with the data input port. [2] dV/dt 1.0 V/ns [3] VCCO is the supply voltage associated with the output port. Test data is given in Table 15. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance. VEXT = External voltage for measuring switching times. Fig 8. Test circuit for measuring switching times VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aae331 VEXT VCC VI VO DUT CL RT RL RL G Table 15. Test data Supply voltage Input Load VEXT VCC(A), VCC(B) VI[1] t/V[2] CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ[3] 1.1 V to 1.6 V VCCI 1.0ns/V 15pF 2k open GND 2VCCO 1.65 V to 2.7 V VCCI 1.0ns/V 15pF 2k open GND 2VCCO 3.0 V to 3.6 V VCCI 1.0ns/V 15pF 2k open GND 2VCCO |
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