STM32F415VG datasheet(78/186 Pages) STMICROELECTRONICS

78 / 186 page

Electrical characteristics

STM32F415xx, STM32F417xx

78/186

DocID022063 Rev 4

5.3

Operating conditions

5.3.1

General operating conditions

Table 12. Current characteristics

Symbol

Ratings

Max.

Unit

IVDD

Total current into VDD power lines (source)(1)

1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power

supply, in the permitted range.

150

IVSS

Total current out of VSS ground lines (sink)(1)

150

IIO

Output current sunk by any I/O and control pin

Output current source by any I/Os and control pin

IINJ(PIN) (2)

2. Negative injection disturbs the analog performance of the device. See note in Section 5.3.20: 12-bit ADC

characteristics.

Injected current on five-volt tolerant I/O(3)

3. Positive injection is not possible on these I/Os. A negative injection is induced by VIN<VSS. IINJ(PIN) must

never be exceeded. Refer to Table 11 for the values of the maximum allowed input voltage.

–5/+0

Injected current on any other pin(4)

4. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. IINJ(PIN) must

never be exceeded. Refer to Table 11 for the values of the maximum allowed input voltage.

±5

ΣIINJ(PIN)(4)

Total injected current (sum of all I/O and control pins)(5)

5. When several inputs are submitted to a current injection, the maximum

ΣIINJ(PIN) is the absolute sum of the

positive and negative injected currents (instantaneous values).

±25

Table 13. Thermal characteristics

Symbol

Ratings

Value

Unit

TSTG

Storage temperature range

–65 to +150

°C

Maximum junction temperature

125

°C

Table 14. General operating conditions

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fHCLK

Internal AHB clock frequency

VOS bit in PWR_CR register = 0(1)

144

MHz

VOS bit in PWR_CR register= 1

168

fPCLK1

Internal APB1 clock frequency

fPCLK2

Internal APB2 clock frequency

VDD

Standard operating voltage

1.8(2)

3.6

VDDA(3)(4)

Analog operating voltage

(ADC limited to 1.2 M samples)

Must be the same potential as

VDD(5)

1.8(2)

2.4

Analog operating voltage

(ADC limited to 1.4 M samples)

2.4

3.6

VBAT

Backup operating voltage

1.65

3.6

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