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AM79C971VCW датащи(PDF) 141 Page - Advanced Micro Devices |
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AM79C971VCW датащи(HTML) 141 Page - Advanced Micro Devices |
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141 / 265 page ![]() Am79C971 141 P R E L I M INARY CSR62: Previous Transmit Byte Count Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-12 RES Reserved locations. 11-0 PXBC Previous Transmit Byte Count. This field is a copy of the BCNT field of TMD1 of the previous transmit descriptor. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR63: Previous Transmit Status Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 PXST Previous Transmit Status. This field is a copy of bits 31-16 of TMD1 of the previous transmit descriptor. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR64: Next Transmit Buffer Address Lower Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NXBAL Contains the lower 16 bits of the next transmit buffer address from which the Am79C971 controller will transmit an outgoing frame. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR65: Next Transmit Buffer Address Upper Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NXBAU Contains the upper 16 bits of the next transmit buffer address from which the Am79C971 controller will transmit an outgoing frame. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected b y H_RE S E T, S _ RE S E T, or STOP. CSR66: Next Transmit Byte Count Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-12 RES Reserved locations. Read and written as zeros. 11-0 NXBC Next Transmit Byte Count. This field is a copy of the BCNT field of TMD1 of the next transmit de- scriptor. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR67: Next Transmit Status Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NXST Next Transmit Status. This field is a copy of bits 31-16 of TMD1 of the next transmit descriptor. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. 7-0 RES Reserved locations. Read and written as zeros. Accessible only when either the STOP or the SPND bit is set. |
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