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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM79C971VCW датащи(PDF) 136 Page - Advanced Micro Devices |
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AM79C971VCW датащи(HTML) 136 Page - Advanced Micro Devices |
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136 / 265 page  136 Am79C971 15-0 CXDAU Contains the upper 16 bits of the current transmit descriptor ad- dress pointer. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR36: Next Next Receive Descriptor Address Lower Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NNRDAL Contains the lower 16 bits of the next next receive descriptor ad- dress pointer. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR37: Next Next Receive Descriptor Address Upper Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NNRDAU Contains the upper 16 bits of the next next receive descriptor ad- dress pointer. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR38: Next Next Transmit Descriptor Address Lower Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NNXDAL Contains the lower 16 bits of the next next transmit descriptor ad- dress pointer. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR39: Next Next Transmit Descriptor Address Upper Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 NNXDAU Contains the upper 16 bits of the next next transmit descriptor ad- dress pointer. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR40: Current Receive Byte Count Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-12 RES Reserved locations. Read and written as zeros. 11-0 CRBC Current Receive Byte Count. This field is a copy of the BCNT field of RMD1 of the current re- ceive descriptor. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. CSR41: Current Receive Status Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 CRST Current Receive Status. This field is a copy of bits 31-16 of RMD1 of the current receive de- scriptor. Read/Write accessible only when either the STOP or the SPND bit is set. These bits are unaffected by H_RESET, S_RESET, or STOP. |
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