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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM79C971VCW датащи(PDF) 197 Page - Advanced Micro Devices |
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AM79C971VCW датащи(HTML) 197 Page - Advanced Micro Devices |
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197 / 265 page  Am79C971 197 AM79C971 CONTROL AND STATUS REGISTERS (CONTINUED) Register Contents CSR58 Software Style (mapped to BCR20) bits [7:0] = SWSTYLE, Software Style Register. 0000 LANCE/PCnet-ISA 0002 PCnet-32 8000 -- 4000 -- 2000 -- 1000 -- 0800 -- 0400 APERREN 0200 CSRPCNET 0100 SSIZE32 0080 SWSTYLE7 0040 SWSTYLE6 0020 SWSTYLE5 0010 SWSTYLE4 0008 SWSTYLE3 0004 SWSTYLE2 0002 SWSTYLE1 0001 SWSTYLE0 CSR76 RCVRL: RCV Descriptor Ring length CSR78 XMTRL: XMT Descriptor Ring length CSR80 FIFO threshold and DMA burst control. (DEFAULT = 2810) 8000 Reserved 4000 Reserved bits [13:12] = RCVFW, Receive FIFO Watermark 0000 Request DMA when 16 bytes are present 1000 Request DMA when 64 bytes are present 2000 Request DMA when 112 bytes are present 3000 Reserved bits [11:10] = XMTSP, Transmit Start Point 0000 Start transmission after 20/44 (No SRAM/SRM) bytes have been written 0400 Start transmission after 64 bytes have been written 0800 Start transmission after 128 bytes have been written 0C00 Start transmission after 248 bytes (full packet) have been written bits [9:8] = XMTFW, Transmit FIFO Watermark 0000 Start DMA when 16 write cycles can be made 0100 Start DMA when 64 write cycles can be made 0200 Start DMA when 108 write cycles can be made 0300 Reserved bits [7:0] = DMA Transfer Counter CSR88~89 Chip ID (Contents = v2623003; v = Version Number) CSR112 Missed Frame Count CSR114 Receive Collision Count CSR122 Receive Frame Alignment Control 8000 -- 4000 -- 2000 -- 1000 -- 0800 -- 0400 -- 0200 -- 0100 -- 0080 -- 0040 -- 0020 -- 0010 -- 0008 -- 0004 -- 0002 -- 0001 RCVALGN CSR124 BMU Test Register (DEFAULT = 0000) 8000 -- 4000 -- 2000 -- 1000 -- 0800 -- 0400 -- 0200 -- 0100 -- 0080 -- 0040 -- 0020 -- 0010 -- 0008 GPSIEN 0004 RPA 0002 -- 0001 -- CSR125 MAC Enhanced Configuration Control (DEFAULT = 603c bits [15:8] = IPG, InterPacket Gap (Default=60xx, 96 bit times) bits [8:0] = IFS1, InterFrame Space Part 1 (Default=xx3c, 60 bit times) |
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