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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM7968 датащи(PDF) 92 Page - Advanced Micro Devices |
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AM7968 датащи(HTML) 92 Page - Advanced Micro Devices |
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92 / 127 page  AMD 88 TAXIchip Integrated Circuits Technical Manual This serves to flush all extraneous data from the buffers and reset all internal state machines. Once this is completed the Transmitter may be Strobed. X1 should be left in the LOW state upon completion of the initialization. The STRB input must now be strobed only once every n = 10 bitclk pulses or more. This will allow time for an 8 bit wide byte to be encoded to 10 bits and shifted out one bit every clock pulse. The parallel data input pins are provided with new data every 10 bitclk pulses. Setup and hold times remain the same as in non-Test Mode with respect to STRB. (In the non-Test modes, the clock rate is the byte rate and a new data word and a strobe is provided every clock pulse. In test mode, the clock rate is the bit rate so the new data word and strobe are provided every n clock pulses). In Test Mode the Receiver expects only single ended data. Thus only one of the SEROUT lines from the Transmitter is used. However, both lines must have pulldown resistors to electrically balance the outputs. Figure 8-1 Transmitter Test Mode Connections ACK STROBE Data IN 8, 9, 10 Command IN 4, 3, 2 SEROUT+ SEROUT– X1 X2 RESET CLK CLS DMS 300 Ω N/C = Test Mode Bit Rate Clock Generator Divide By n or Byte Rate Clock Am7968 N/C TLS 300 Ω Media Interface Can Be Set for 8, 9, or 10-Bit Mode To Receiver 12330E-35 |
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