AM29F200A datasheet(35/39 Pages) AMD

35 / 39 page

Am29F200A

P R E L I M I NARY

ERASE AND PROGRAMMING PERFORMANCE

Notes:

1. Typical program and erase times assume the following conditions: 25

°C, 5.0 V V

CC, 100,000 cycles. Additionally,

programming typicals assume checkerboard pattern.

2. Under worst case conditions of 90°C, VCC = 4.5 V, 100,000 cycles.

3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes

program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then

does the device set DQ5 = 1. See the section on DQ5 for further information.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 1

for further information on command definitions.

6. The device has a guaranteed minimum erase and program cycle endurance of 100,000 cycles.

LATCHUP CHARACTERISTICS

Includes all pins except VCC. Test conditions: VCC = 5.0 V, one pin at a time.

TSOP AND SO PIN CAPACITANCE

Notes:

1. Sampled, not 100% tested.

2. Test conditions TA = 25°C, f = 1.0 MHz.

DATA RETENTION

Parameter

Limits

Comments

Typ (Note 1)

Max (Note 2)

Unit

Sector Erase Time

sec

Excludes 00h programming prior to

erasure (Note 4)

Chip Erase Time

sec

Byte Programming Time

300

µs

Excludes system-level overhead

(Note 5)

Word Programming Time

600

µs

Chip Programming Time (Note 3)

1.8

5.4

sec

Parameter Description

Min

Max

Input Voltage with respect to VSS on all I/O pins

–1.0 V

VCC + 1.0 V

VCC Current

–100 mA

+100 mA

Parameter

Symbol

Parameter Description

Test Setup

Typ

Max

Unit

CIN

Input Capacitance

VIN = 0

7.5

COUT

Output Capacitance

VOUT = 0

8.5

CIN2

Control Pin Capacitance

VIN = 0

Parameter

Test Conditions

Min

Unit

Minimum Pattern Data Retention Time

150

°C

Years

125

°C

Years

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