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TC1017 датащи(PDF) 14 Page - Microchip Technology |
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TC1017 датащи(HTML) 14 Page - Microchip Technology |
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14 / 22 page ![]() TC1017 DS21813D-page 14 © 2005 Microchip Technology Inc. FIGURE 5-3: Power Dissipation vs. Ambient Temperature (SOT-23 Package). FIGURE 5-4: Maximum Current vs. Ambient Temperature (SOT-23 Package). 5.4 Layout Considerations The primary path for heat conduction out of the SC-70/ SOT-23 package is through the package leads. Using heavy wide traces at the pads of the device will facili- tate the removal of the heat within the package, thus lowering the thermal resistance R θJA. By lowering the thermal resistance, the maximum internal power dissi- pation capability of the package is increased. FIGURE 5-5: SC-70 Package Suggested Layout. 0 100 200 300 400 500 600 700 -40 -15 10 35 60 85 110 Ambient Temperature (°C) 0 20 40 60 80 100 120 140 160 -40 -15 10 35 60 85 110 Ambient Temperature (°C) VIN - VOUT = 1V SHDN U1 V IN V OUT GND C1 C2 |
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