PIC24HJ128GP310 datasheet(48/286 Pages) MICROCHIP

48 / 286 page

TABLE 3-29:

SYSTEM CONTROL REGISTER MAP

File Name

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

RCON

0740

TRAPR

IOPUWR

—

VREGS

EXTR

SWR

SWDTEN

WDTO

SLEEP

IDLE

BOR

POR

xxxx(1)

OSCCON

0742

—COSC<2:0>

—

NOSC<2:0>

CLKLOCK

—LOCK

—CF

—

LPOSCEN

OSWEN

0300(2)

CLKDIV

0744

ROI

DOZE<2:0>

DOZEN

FRCDIV<2:0>

PLLPOST<1:0>

—

PLLPRE<4::0>

0040

PLLFBD

0746

—

PLLDIV<8:0>

0030

OSCTUN

0748

—

TUN<5:0>

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note

RCON register Reset values dependent on type of Reset.

OSCCON register Reset values dependent on the FOSC Configuration bits and by type of Reset.

TABLE 3-30:

NVM REGISTER MAP

File Name

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

NVMCON

0760

WREN

WRERR

—

ERASE

—

—NVMOP<3:0>

0000(1)

NVMKEY

0766

—

NVMKEY<7:0>

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note

Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.

TABLE 3-31:

PMD REGISTER MAP

File Name

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

PMD1

0770

T5MD

T4MD

T3MD

T2MD

T1MD

—

I2C1MD

U2MD

U1MD

SPI2MD

SPI1MD

C2MD

C1MD

AD1MD

0000

PMD2

0772

IC8MD

IC7MD

IC6MD

IC5MD

IC4MD

IC3MD

IC2MD

IC1MD

OC8MD

OC7MD

OC6MD

OC5MD

OC4MD

OC3MD

OC2MD

OC1MD

0000

PMD3

0774

T9MD

T8MD

T7MD

T6MD

—

—I2C2MD

AD2MD

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

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