MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS

MP28253 Rev. 1.02

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13

12/25/2013

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input voltage ripple caused by capacitance can

be estimated by:

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

×

×

×

=

Δ

IN

OUT

IN

OUT

S

LOAD

IN

V

V

1

V

V

1

C

f

I

V

Selecting the Output Capacitor

The output capacitor (C2) is required to maintain

the DC output voltage. Ceramic, tantalum, or low

ESR electrolytic capacitors are recommended.

Low ESR capacitors are preferred to keep the

output voltage ripple low. The output voltage

ripple can be estimated by:

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

×

×

+

×

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

×

×

=

Δ

2

C

f

8

1

R

V

V

1

L

f

V

V

S

ESR

IN

OUT

S

OUT

OUT

equivalent series resistance (ESR) value of the

output capacitor.

In the case of ceramic capacitors, the impedance

at the switching frequency is dominated by the

capacitance. The output voltage ripple is mainly

caused by the capacitance. For simplification, the

output voltage ripple can be estimated by:

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

×

×

×

×

=

IN

OUT

2

S

OUT

OUT

V

V

1

2

C

L

f

8

V

ΔV

In the case of tantalum or electrolytic capacitors,

the ESR dominates the impedance at the

switching frequency. For simplification, the output

ripple can be approximated to:

ESR

IN

OUT

S

OUT

OUT

R

V

V

1

L

f

V

ΔV

×

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

×

×

=

The characteristics of the output capacitor also

affect the stability of the regulation system. The

MP28253 can be optimized for a wide range of

capacitance and ESR values..

The recommended external BST diode is IN4148,

and the BST cap is 0.1~1µF.

PCB Layout

PCB layout is very important to achieve stable

operation. Please follow these guidelines and

take Figure 7 for references.

1) Keep the connection of input ground and

GND pin as short and wide as possible.

2) Keep the connection of input capacitor and

IN pin as short and wide as possible.

3) Ensure all feedback connections are short

and direct. Place the feedback resistors and

compensation components as close to the

chip as possible.

4) Route SW away from sensitive analog areas

such as FB.

5) Connect IN, SW, and especially GND

respectively to a large copper area to cool

the chip to improve thermal performance and

long-term reliability.

6) Adding RC snubber circuit from IN pin to SW

pin can reduce SW spikes.

BST

SW

SW

SW

SW

EN

C2

L1

C1

2

14

13

12

11

10

9

8

1

2

3

4

5

6

7

FB

PG

GND

GND

AGND

VCC

VIN

IN

R2

GND

Css

SS

Top Layer

Bottom Layer

Figure 7—PCB Layout