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AAT1171

600mA Voltage-Scaling Step-Down Converter

for RF Power Amplifiers with Bypass Switch

DATA SHEET

Low Dropout Operation

For conditions where the input voltage drops to the out-

put voltage level, the converter duty cycle increases to

100%. As 100% duty cycle is approached, the minimum

off-time initially forces the high-side on-time to exceed

the 2MHz clock period, reducing the converter switching

frequency. Once the input drops to the level where the

output can no longer be regulated, the high-side P-channel

MOSFET is enabled continuously for 100% duty cycle. The

output voltage then tracks the input voltage minus the IR

UVLO Shutdown

Under-voltage lockout (UVLO) circuitry monitors the input

voltage and disables the converter when the input voltage

drops to 2.4V, guaranteeing sufficient operating input

voltage to maintain output voltage regulation and control.

For a rising input voltage, the UVLO circuitry enables the

converter 200mV above the shutdown level at 2.6V.

Current Limit and

Short-Circuit Protection

The high-side P-channel MOSFET current limit compara-

tor limits the peak inductor current to 1.6A. In PWM

mode, the synchronous MOSFET current limit compara-

tor limits the peak negative inductor current, and output

capacitor discharge current is limited to 1A. In bypass

mode, the bypass MOSFET current is limited to 600mA.

In the event of an overload or short-circuit condition, the

current limit protects the load and the AAT1171 power

devices. Upon removal of the short-circuit or fault condi-

tion, the AAT1171 output automatically recovers to the

regulated level.

Thermal Overload Protection

The maximum junction temperature is limited by the

AAT1171 over-temperature shutdown protection circuit-

ry. Both the step-down converter and the bypass

MOSFET are disabled when the junction temperature

reaches 140°C. Normal operation resumes once the

junction temperature drops to 125°C.

External Synchronization

The AAT1171 switching frequency can be synchronized to

an external square wave clock via the MODE/SYNC input.

The external clock frequency range and logic levels for

which the AAT1171 will remain synchronized are listed in

the Electrical Characteristics table of this datasheet.

Applications Information

Inductor Selection

The step-down converter uses peak current mode con-

trol with slope compensation to maintain stability for

duty cycles greater than 50%. Because the required

slope compensation varies with output voltage, the

AAT1171 varies the slope compensation to match the

output voltage. This allows the use of a single inductor

value for all output voltage levels. The inductor value is

2.2μH for the AAT1171-1/AAT1171-4 and 4.7μH for the

AAT1171-5.

Manufacturer’s specifications list both the inductor DC

current rating, which is a thermal limitation, and the

peak current rating, which is determined by the satura-

tion characteristics.

The inductor should not show any appreciable saturation

under normal load conditions. The inductor ripple cur-

rent varies with both the input voltage and the output

voltage and peaks at the maximum input voltage with

the output at one half of the input voltage. For the typi-

cal AAT1171, this corresponds to a 4.2V input voltage

and a 2.1V output voltage. With the suggested 2.2μH

inductor, this corresponds to 239mA peak-to-peak ripple

current. For a 600mA DC load current, the peak inductor

current would be 718mA. In order to prevent saturation

under normal load conditions, the peak inductor current

should be less than the inductor saturation current.

V

IN(MAX)

8 ∙ L ∙ F

S

4.2V

8 ∙ 2.2μH ∙ 2MHz

I

= 0.6A +

= 0.6A + 0.12A

= 0.72A

Some inductors may meet peak and average current

requirements yet result in excessive losses due to a high

DCR. Always consider the losses associated with the

DCR and its effect on the total converter efficiency when

selecting an inductor. The inductor losses can be esti-

mated by using the full load output current. The output

inductor losses can then be calculated to estimate their

effect on overall device efficiency.