20 www.microsemi.com/soc

• Single-chipASICalternative

• 3,000to54,000systemgates

• Upto2.5kbitsconfigurable

dual-portSRAM

• Fastwide-decodecircuitry

• Upto202user-programmable

I/O pins

• Highperformance

mixed-voltage solution

• PCIcompliant

• Containsembeddeddual-port

SRAMmodules

• QMLcertification

• Ceramicdevicesavailable

to DSCC SM

MX

MX Devices

I/Os Per Package

MX Devices

A40MX02

A40MX04

A42MX09

A42MX16

A42MX24

A42MX36

PL

44, 68

44, 68, 84

84

84

84

PQ

100

100

100, 160

100, 160, 208

160, 208

208, 240

VQ

80

80

100

100

TQ

176

176

176

CQ

208, 256

BG

272

Theprice/performanceleaderat5.0V

Featuring very low power consumption and the industry’s highest design security, MX FPGAs offer designers a reliable, single-chip ASIC alternative. MX devices

provide high performance while shortening the system design and development cycle. Offering an efficient, flexible 5.0 V architecture, MX is an ideal high-volume

platform for integrating your legacy PLDs into a single device. Example applications include high-speed controllers and address decoding, peripheral bus

interfaces, DSP, and coprocessor functions.

MX Devices

A40MX02

A40MX04

A42MX09

A42MX16

A42MX24

A42MX36

System Gates

3,000

6,000

14,000

24,000

36,000

54,000

SRAMBits

—

—

—

—

—

2,560

Sequential

—

—

348

624

954

1,230

Combinatorial

295

547

336

608

912

1,184

Decode

—

—

—

—

24

24

Clock-to-Out

9.5 ns

9.5 ns

5.6 ns

6.1 ns

6.1 ns

6.3 ns

SRAMModules

(64x4or32x8)

—

—

—

—

—

10

Dedicated Flip-Flops

—

—

348

624

954

1,230

Clocks

1

1

2

2

2

6

Maximum Flip-Flops

147

273

516

928

1,410

1,822

User I/Os (maximum)

57

69

104

140

176

202

PCI

—

—

—

—

Yes

Yes

BoundaryScanTest(BST)

—

—

—

—

Yes

Yes

Speed Grades

–F, Std., –1, –2, –3

–F, Std., –1, –2, –3

–F, Std., –1, –2, –3

–F, Std., –1, –2, –3

–F, Std., –1, –2, –3

–F, Std., –1, –2, –3

Temperature Grades

C, I, M, A

C, I, M, A

C, I, M, A

C, I, M, A

C, I, M, A

C, I, M, A, B