MP8666 – 6A, 21V, 600kHz STEP-DOWN WITH SYNCHRONIZABLE GATE DRIVER

MP8666 Rev. 1.21

www.MonolithicPower.com

4

9/21/2011

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PIN FUNCTIONS

Pin #

Name

Description

1

SW

Switch Output.

2

BST

Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply

voltage. It is connected between SW and BS pins to form a floating supply across the power

switch driver.

3

VCC

BG Driver Bias Supply. Decouple with a 1µF ceramic capacitor. X7R or X5R grade dielectric

ceramic capacitors are recommended for their stable temperature characteristics.

4

BG

Gate Driver Output. Connect this pin to the gate of the synchronous MOSFET.

5

GND

Ground. This pin is the voltage reference for the regulated output voltage. For this reason

care must be taken in its layout. This node should be placed outside of the M2 to C1 ground

path to prevent switching current spikes from inducing voltage noise into the part.

6

FB

Feedback. An external resistor divider from the output to GND, tapped to the FB pin sets

the output voltage. To prevent current limit run away during a short circuit fault condition the

frequency foldback comparator lowers the oscillator frequency when the FB voltage is

below 250mV.

7

EN/SYNC On/Off Control and External Frequency Synchronization Input.

8

IN

Supply Voltage. The MP8666 operates from a +4.5V to +21V unregulated input. C1 is

needed to prevent large voltage spikes from appearing at the input.