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MP6402 датащи(PDF) 13 Page - Monolithic Power Systems |
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MP6402 датащи(HTML) 13 Page - Monolithic Power Systems |
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13 / 15 page ![]() MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC MP6402 Rev.1.0 www. MonolithicPower.com 13 4/8/2011 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. APPLICATION INFORMATION Operating Region and Power Dissipation The maximum power dissipation of MP6402 depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of airflow. The power dissipation across the device is P = IOUT x (VIN - VOUT) The maximum power dissipation is: PD (MAX) = (TJ (MAX)-TA)/θJA Where (TJ (MAX) – TA) is the temperature difference between the MP6402 die junction and the surrounding environment, θJA is the thermal resistance from the junction to the surrounding environment. The FIN of the MP6402 performs the dual function of providing an electrical connection to ground and channeling heat away. Connect the FIN to ground using a large pad or ground plane. Input Capacitor Selection Using a capacitor whose value is higher than 1µF on the MP6402 input and the amount of capacitance can be increased without limit. Larger values will help improve line transient response with the drawback of increased size. Ceramic capacitors are preferred. Output Capacitor Selection The MP6402 is designed specifically to work with very low ESR ceramic output capacitor in space- saving and performance consideration. A ceramic capacitor in the range of 3.3µF and 10µF, and with ESR lower than 0.5Ω is suitable for the MP6402 application circuit. Output capacitor of larger values will help to improve load transient response and reduce noise with the drawback of increased size. Programmable Reset Delay Time The reset delay time is determined by the value of external capacitor (C4) connected to ExtCap pin. Typically the reset delay time is 2.1mSec when the external capacitor is 3300pF. For a given delay time, the capacitor value can be calculated using the following equation: 0.1 ] 6 . 0 ) nF ( C [ ) ms ( T 4 D + × = The reset delay time is determined by the charge time of external capacitor. Stray capacitance may cause errors of the delay time. A ceramic capacitor with low leakage is strongly recommended. |
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