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MP4653 датащи(PDF) 16 Page - Monolithic Power Systems

номер детали MP4653
подробное описание детали  Real LIPS CC/CV Mode LLC TV LED Driver
PDF  25 Pages
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производитель  MPS [Monolithic Power Systems]
домашняя страница  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP4653 датащи(HTML) 16 Page - Monolithic Power Systems

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MP4653—REAL LIPS CC/CV MODE LLC TV LED DRIVER
MP4653 Rev 1.01
www.MonolithicPower.com
16
6/28/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
OPERATION
The MP4653 is a CC/CV mode LLC TV LED
driver, especially designed for the real LIPS
structure for the large size TV LED backlighting.
Powered by 9V to 30V input supplies, the
MP4653 outputs two 180 degree phase shifted
driving signals for the external power stages. Its
enhanced 9V gate driver provides adequate
driving capability and can directly drive the
external MOSFETs through an external gate
driving transformer.
The MP4653 employs frequency control for
the LLC power stage. Both the LED current and
the bus voltage are controlled. Figure 1 shows
the block diagram of MP4653.
Internal Regulator
The MP4653 includes an internal linear
regulator VCC. It is the supply voltage for the
gate driver and also for the internal circuit. The
MP4653 features Under Voltage Lockout. The
chip is disabled until VCC exceeds the UVLO
threshold.
System Startup
When the MP4653 is powered up, the VCC is
charged up, and when it passes the UVLO
threshold, IC starts up. It resets the voltage
control loop, the current control loop and
discharges the soft start capacitor. The MP4653
enjoys a soft start up.
The MP4653 gets a 4.35V input UVLO
threshold, and it can start up directly from the
system 5V standby power supply. Please refer
to figure 2.
The PWM dimming signal controls the start up
of the LED driver stage. The system operates in
constant voltage mode and the DC bus voltage
is controlled before PWM signal applied.
CC/CV Mode Operation
The MP4653 integrates a constant voltage
control loop (CV) and a constant current control
loop (CC). Both the LED current of the LED
stage and the bus voltage of the bus voltage
stage are controlled. The PWM dimming signal
is used to distinguish these two modes. At
PWM on interval, the current control loop is
effective (CC mode) and the LED current is
regulated. At PWM off interval, the voltage
control loop is effective and the DC bus voltage
is controlled (CV mode).
For the current control loop for the LED current
regulation, the LED current is fed back to IFB
pin. The internal error amplifier regulates the
average value of IFB signal to the internal
200mV
reference
voltage.
Its
output
is
connected
to
the
external
current-loop
compensation network on ICOMP pin through
an inner switch S1. At PWM on interval, S1 is
on, and the output of the error amplifier is
connected
to
the
external
compensation
network on ICOMP pin. The LED current is
regulated by this control loop. At PWM off
interval, S1 is turned off, and the compensation
network on ICOMP is disconnected from the
error amplifier and holds its value until next
PWM on interval. The output of the error
amplifier is pulled low at PWM off interval.
MP4653 integrates burst mode for the LED
current regulation. When IFB voltage is higher
than 1.1 times of its reference voltage and the
ICOMP voltage is sufficiently low (which means
a highest operating frequency), the IC skips
some switching cycles until IFB voltage
decreases sufficiently.
For the voltage control loop for the bus voltage
regulation, the bus voltage is fed back on VFB
pin. MP4653 automatically samples the VFB
voltage at PWM on interval and uses it as the
reference for the voltage control loop. The
internal voltage-loop error amplifier regulates
the average value of the VFB voltage to this
reference voltage at PWM off interval. Its output
is connected to the external voltage-loop
compensation network on VCOMP pin through
an inner switch S2. At PWM off interval, S2 is
on, and the output of the voltage-loop error
amplifier
is
connected
to
the
external
compensation network on VCOMP pin. The bus
voltage is regulated by this control loop. At
PWM on interval, S2 is turned off, and the
compensation
network
on
VCOMP
is
disconnected from the error amplifier and holds
its value until next PWM off interval. The output



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