MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER

MP4652 Rev. 1.01

www.MonolithicPower.com

16

9/23/2011

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Power Stage

The power stage is a half-bridge LLC topology.

The primary side is composed of Q4, Q3, C19

and T2. The LLC resonant network is composed

of the leakage inductance of T2, the magnetic

inductance of T2, and C19. Q4 and Q3 should be

chosen to handle the input voltage and the LLC

current. Consider the operating frequency, the

input condition and the output condition when

selecting

the

resonant

cap,

the

leakage

inductance, and the magnetic inductance. Refer

to MP4652 LLC design notes for details.

On the secondary side, the diodes D6, D8, D9,

and D10 rectify the LLC current. These diodes

must be able to handle the output voltage and

the output current: they are 200V/3A diodes in

this circuit. The balance cap C23 blocks the

different voltage of the 2 LED strings and

balances the currents through them. The value of

C23 is usually between 0.22μF and 1μF. Its

voltage must be higher than the output voltage

because of the LED string short condition. The

output capacitors C28 and C29 filter the ripple

current of the LLC output current to obtain a DC

current for the LED strings. C28 and C29 also

store the energy from the primary side at the

PWM off interval, as MP4652 implements

continuous gate driver at PWM off interval to

eliminate the audible noise. The value of C28

and C29 must be large enough to handle this

energy to prevent excessive output voltage

spikes: Capacitor values from 4.7μF to 22μF are

typical for this application. The voltage stress of

these output capacitors should be higher than the

maximum output voltage.

Control Circuit

MP4652 controls the power MOSFETs Q3 and

Q4 in the power stage through the gate driver

transformer T1. As MP4652 outputs regulated 9V

gate driver signals, the turn ratio of T1 goes from

1:1:1 to 1:1.5:1.5. With its enhanced gate driver

capability and regulated driver voltage, MP4652

can directly drive the MOSFETs through the gate

driver transformer.

Because an LLC is a frequency-controlled power

stage, MP4652 uses an external amplifier U3 to

regulate the LED current and output the

frequency control voltage. During the PWM ON

interval, PWMOUT is high and the dimming

MOSFET Q8 turns on. The LED current feeds

back to the inverting input of U3. With the

compensation network, U3 outputs the frequency

control voltage and regulates the LED current.

During the PWM OFF interval, the dimming

MOSFET turns off, and LED current feedback

goes low. An external voltage applied to the

inverting input of U3 through D5 pulls the output

of U3 low. This design helps the circuit work at a

high frequency during the PWM OFF interval and

limits the output energy delivered from the

primary side to the secondary side.

Together with the output capacitors C28 and C29,

this circuit helps to eliminate current overshot

during PWM ON. The signal MOSFETs Q6 and

Q7 are turned off during the PWM OFF interval,

and C21 and C24 can hold their value during this

time. This helps the control loop to respond

quickly during the PWM ON interval and to

achieve fast PWM dimming.

R35 and C12 on the FSET pin form a frequency

soft-start circuit at start up.

The maximum output voltage is fed back to OVP

pin through the voltage dividers. MP4652 can

protect the open LED condition through the OVP

pin. When the voltage on OVP pin is higher than

2.38V for 7μs, IC enters Fault Mode.

The secondary side current is fed back to SSD

pin through R47, R46 and C25. When short

condition occurs, the secondary side current

grows and the SSD voltage falls. When SSD

voltage falls below 2.36V for 7μs, the IC enters

fault mode.

In Fault Mode, the PWMOUT pulls low. The

device then outputs an error signal to the system

with the addition of an external logic circuit,.

Please refer to the design notes for details of the

components selection.