MP3908 – HIGH EFFICIENCY BOOST CONTROLLER

MP3908 Rev. 0.9

www.MonolithicPower.com

4

8/29/2008

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OPERATION

Enable

Vref = 0.8V

1.2V

Clamp

Slope

Compensation

COMP

SGND

FB

CSS

ENABLE

EA Translator

Optional Filter

EA

Oscillator

Delay

Internal

Bias

RDELAY

9.9V

--

--

+

+

Rsense

Driver

PGND

Rdson

sensing

MAIN

RDLY

ISENSE

SYNC

Gates

Off

Turn

Off

--

+

S

R

Q

Q

S

R

Q

Figure 1—Functional Block Diagram

The MP3908 uses a constant frequency, peak

current mode architecture to regulate the

feedback voltage. The operation of the MP3908

can be understood with the block diagram of

Figure 1.

At the beginning of each cycle the main

external N-Channel MOSFET is turned on,

forcing the current in the inductor to increase.

The current through the FET can either be

sensed through a sensing resistor or across the

external FET directly. This voltage is then

compared

to

a

voltage

related

to

the

COMP/RUN node voltage. The voltage at the

COMP/RUN pin is an amplified voltage of the

difference between the 0.8V reference and the

feedback node voltage.

When the voltage at the ISENSE node rises

above the voltage set by the COMP/RUN pin,

the external main FET is turned off and the

synchronous FET, if used, is turned on. The

inductor current then flows to the output

capacitor through the Schottky diode. The

inductor

current

is

controlled

by

the

COMP/RUN voltage, which itself is controlled

by the output voltage. The peak inductor current

comparator input.

Thus the output voltage controls the inductor

current to satisfy the load. This current mode

architecture improves transient response and

control loop stability over a voltage mode

architecture.