MTP52N06VL

5

Motorola TMOS Power MOSFET Transistor Device Data

DRAIN–TO–SOURCE DIODE CHARACTERISTICS

VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)

Figure 8. Gate–To–Source and Drain–To–Source

Voltage versus Total Charge

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

RG, GATE RESISTANCE (OHMS)

1

10

100

VDD = 30 V

ID = 52 A

VGS = 5 V

TJ = 25°C

Figure 10. Diode Forward Voltage versus Current

0

QT, TOTAL CHARGE (nC)

10

20

30

40

70

ID = 52 A

TJ = 25°C

1000

100

10

1

9

6

2

0

8

4

27

24

6

3

0

QT

Q2

Q1

Q3

VGS

VDS

td(on)

td(off)

tf

tr

VGS = 0 V

TJ = 25°C

50

40

30

20

10

0

0.75

0.8 0.85

0.9 0.95

1

10

30

1.05

50

60

21

18

15

12

9

55

45

35

25

15

5

0.7

0.65

0.5

5

1

7

3

0.55

0.6

SAFE OPERATING AREA

The Forward Biased Safe Operating Area curves define

the maximum simultaneous drain–to–source voltage and

drain current that a transistor can handle safely when it is

forward biased. Curves are based upon maximum peak

junction temperature and a case temperature (TC) of 25°C.

Peak repetitive pulsed power limits are determined by using

the thermal response data in conjunction with the procedures

discussed in AN569, “Transient Thermal Resistance–General

Data and Its Use.”

Switching between the off–state and the on–state may

traverse any load line provided neither rated peak current

(IDM) nor rated voltage (VDSS) is exceeded and the transition

time (tr,tf) do not exceed 10 µs. In addition the total power

averaged over a complete switching cycle must not exceed

(TJ(MAX) – TC)/(R

θJC).

A Power MOSFET designated E–FET can be safely used

in switching circuits with unclamped inductive loads. For

reliable operation, the stored energy from circuit inductance

dissipated in the transistor while in avalanche must be less

than the rated limit and adjusted for operating conditions

differing from those specified. Although industry practice is to

rate in terms of energy, avalanche energy capability is not a

constant. The energy rating decreases non–linearly with an

increase of peak current in avalanche and peak junction

temperature.

Although many E–FETs can withstand the stress of

drain–to–source avalanche at currents up to rated pulsed

current (IDM), the energy rating is specified at rated

continuous current (ID), in accordance with industry custom.

The energy rating must be derated for temperature as shown

in the accompanying graph (Figure 12). Maximum energy at

currents below rated continuous ID can safely be assumed to

equal the values indicated.