MP2565 – 2.5A, 4MHz, 50V STEP-DOWN CONVERTER

MP2565 Rev. 0.91

www.MonolithicPower.com

14

4/19/2011

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High Frequency Operation

The switching frequency of MP2565 can be

programmed up to 4MHz by an external resistor.

Please pay attention to the following if the

switching frequency is above 2MHz.

The minimum on time of MP2565 is about

100ns (typ). Pulse skipping operation can be

seen more easily at higher switching frequency

due to the minimum on time. Refer to Figure 2

below for detailed information.

vs Switching Frequency

30

25

20

15

10

5

1500 2000 2500 3000 3500 4000

Since the internal bootstrap circuitry has higher

impedance, which may not be adequate to

charge the bootstrap capacitor during each (1-

D)×Ts charging period, an external bootstrap

charging diode is strongly recommended if the

switching frequency is above 2MHz (see

External Bootstrap Diode section for detailed

implementation information).

With higher switching frequencies, the inductive

so that the ESL of input/output capacitor

determines the input/output ripple voltage at

higher switching frequency. As a result of that,

high frequency ceramic capacitor is strongly

recommended as input decoupling capacitor

and output filtering capacitor for such high

frequency operation.

Layout becomes more important when the

device switches at higher frequency. It is

essential

to

place

the

input

decoupling

capacitor, catch diode and the MP2565 (Vin pin,

SW pin and PGND) as close as possible, with

traces that are very short and fairly wide. This

can help to greatly reduce the voltage spike on

SW node, and lower the EMI noise level as well.

Try to run the feedback trace as far from the

inductor and noisy power traces as possible. It

is often a good idea to run the feedback trace

on the side of the PCB opposite of the inductor

with a ground plane separating the two. The

compensation components should be placed

closed to the MP2565. Do not place the

compensation components close to or under

high dv/dt SW node, or inside the high di/dt

power loop. If you have to do so, the proper

ground plane must be in place to isolate those.

Switching loss is expected to be increased at

high switching frequency. To help to improve

the thermal conduction, a grid of thermal vias

can be created right under the exposed pad. It

is recommended that they be small (15mil

barrel diameter) so that the hole is essentially

filled up during the plating process, thus aiding

conduction to the other side. Too large a hole

can cause ‘solder wicking’ problems during the

reflow soldering process. The pitch (distance

between the centers) of several such thermal

vias in an area is typically 40mil. Please refer to

the PCB layout guide and example on EV2565

datasheet.