MP2498 –INTEGRATED 100V LOAD DUMP PROTECTION, 2A STEP-DOWN REGULATOR

MP2498 Rev. 1.0

www.MonolithicPower.com

4

8/7/2012

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© 2012 MPS. All Rights Reserved.

PIN FUNCTIONS

QFN

Pin #

Name

Description

1

AGND

Analog Ground, connect to COMP, FREQ, FB, and EN circuits ground.

3

FREQ

Switching Frequency Program Input. Connect a resistor from this pin to ground to set

the switching frequency.

4

GND,

Exposed pad

Ground. It should be connected as close as possible to the output capacitor avoiding

the high current switch paths. Connect exposed pad to GND plane for optimal thermal

performance.

7, 8

VDD

Input Supply of Buck regulator. This supplies power to all the internal control circuitry,

both BS regulators and the high-side switch. A decoupling capacitor to ground must

be placed close to this pin to minimize switching spikes.

10

CTR

voltage.

18

IN

Exposed Pad

Connect input power supply, which may have surge voltage to IN pin. Also connect

exposed pad to VIN plane for optimal thermal performance.

20

BST

Bootstrap. This is the positive power supply for the internal floating high-side

MOSFET driver. Connect a bypass capacitor between this pin and SW pin.

21, 22

SW

to ground is required. The rectifier must be close to the SW pins to reduce switching

spikes.

26

EN

Enable Input. Pulling this pin below the specified threshold shuts the chip down.

Pulling it up above the specified threshold or leaving it floating enables the chip.

27

COMP

Compensation. This node is the output of the GM error amplifier. Control loop

frequency compensation is applied to this pin.

28

FB

Feedback. This is the input to the error amplifier. An external resistive divider

connected between the output and GND is compared to the internal +0.8V reference

to set the regulation voltage.