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MP155 датащи(PDF) 11 Page - Monolithic Power Systems |
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MP155 датащи(HTML) 11 Page - Monolithic Power Systems |
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11 / 20 page ![]() MP155 – ENERGY EFFICIENT OFF-LINE REGULATOR MP155 Rev. 1.12 www.MonolithicPower.com 11 10/28/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. Over Load Protection (OLP) As the load increases, the peak current and the switching frequency increase with the load. When the switching frequency and peak current reaches their maximums, the output voltage will decrease if the load continues to increase. Then the FB voltage will drop below OLP threshold. By continuously monitoring the FB voltage, the timer starts when the FB voltage drops below the 1.7V error flag threshold. Removing the error flag resets the timer. If the timer continues to completion at 170ms (fs =37kHz), OLP occurs. This timer duration avoids triggering OLP when the power supply starts up or enters a load transition phase, and therefore requires that the power supply start up in less than 170ms. A different switching frequency (fs) changes the over-load protection delay time, as shown below: τ≈ × Dealy 37kHz 170ms fs Short Circuit Protection (SCP) The MP155 shuts down when the peak current rises above 450mA as its short-circuit protection threshold. The power supply resumes operation after removing the fault. Thermal shutdown (TSD) To prevent from any lethal thermal damage, the MP150 shuts down switching when the inner temperature exceeds 150°C. During thermal shutdown (TSD), the VCC drops to 2.4V, and then the internal high voltage regulator recharges VCC. Open Loop Detection If the VFB drops below 60mV, the IC will stop working and begins a re-start cycle. The open- loop detection is blanked for 128 switching cycles during start-up. Leading-Edge Blanking An internal leading-edge blanking (LEB) unit between the current sense resistor inside the IC and the current comparator input avoids prematurely switching pulse termination due to the parasitic capacitance. During the blanking period, the current comparator is disabled and cannot turn off the external MOSFET. Figure 6 shows leading-edge blanking. Figure 6: Leading-Edge Blanking |
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