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JS28F320J3F75A датащи(PDF) 21 Page - Numonyx B.V |
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JS28F320J3F75A датащи(HTML) 21 Page - Numonyx B.V |
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21 / 66 page ![]() Jan 2011 Datasheet 208032-03 21 Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC) 6.0 Electrical Characteristics 6.1 DC Current Specifications Table 7: DC Current Characteristics VCCQ 2.7 - 3.6V Test Conditions Notes VCC 2.7 - 3.6V Symbol Parameter Typ Max Unit ILI Input and VPEN Load Current — ±1 μA VCC = VCC Max; VCCQ = VCCQ Max VIN = VCCQ or VSS 1 ILO Output Leakage Current — ±10 μA VCC= VCC Max; VCCQ = VCCQ Max VIN = VCCQ or VSS 1 ICCS VCC Standby Current 50 120 μA CMOS Inputs, VCC = VCC Max; Vccq = VccqMax Device is disabled (see Table 17, “Chip Enable Truth Table for 32-, 64-, 128-Mb” on page 30), RP# = VCCQ ± 0.2 V 1,2,3 0.71 2 mA TTL Inputs, VCC = VCC Max, Vccq = VccqMax Device is disabled (see Table 17, “Chip Enable Truth Table for 32-, 64-, 128-Mb” on page 30), RP# = VIH ICCD VCC Power-Down Current 50 120 μARP# = VSS ± 0.2 V, IOUT (STS) = 0 mA — ICCR 8-Word Page 15 20 mA CMOS Inputs, VCC = VCC Max, VCCQ = VCCQ Max using standard 8 word page mode reads. Device is enabled (see Table 17, “Chip Enable Truth Table for 32-, 64-, 128-Mb” on page 30) f = 5 MHz, IOUT = 0 mA 1,3 30 54 mA CMOS Inputs,VCC = VCC Max, VCCQ = VCCQ Max using standard 8 word page mode reads. Device is enabled (see Table 17, “Chip Enable Truth Table for 32-, 64-, 128-Mb” on page 30) f = 33 MHz, IOUT = 0 mA ICCW VCC Program or Set Lock-Bit Current 35 60 mA CMOS Inputs, VPEN = VCC 1,4 40 70 mA TTL Inputs, VPEN = VCC ICCE ICCBC VCC Block Erase or VCC Blank Check or Clear Block Lock-Bits Current 35 70 mA CMOS Inputs, VPEN = VCC 1,4 40 80 mA TTL Inputs, VPEN = VCC ICCWS ICCES VCC Program Suspend or Block Erase Suspend Current —10 mA Device is enabled (see Table 17, “Chip Enable Truth Table for 32-, 64-, 128-Mb” on page 30) 1,5 Notes: 1. All currents are in RMS unless otherwise noted. These currents are valid for all product versions (packages and speeds). Contact Numonyx or your local sales office for information about typical specifications. 2. Includes STS. 3. CMOS inputs are either VCC ± 0.2 V or VSS ± 0.2 V. TTL inputs are either VIL or VIH. 4. Sampled, not 100% tested. 5. ICCWS and ICCES are specified with the device selected. If the device is read or written while in erase suspend mode, the device’s current draw is ICCR and ICCWS. |
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