AD7475 datasheet(19/24 Pages) AD

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AD7475/AD7495

Rev. B | Page 19 of 24

POWER VS. THROUGHPUT RATE

By using the partial power-down mode on the AD7475/

AD7495 when not converting, the average power consumption

of the ADC decreases at lower throughput rates. Figure 24

shows how, as the throughput rate is reduced, the part remains

in its partial power-down state longer and the average power

consumption over time drops accordingly.

THROUGHPUT (kSPS)

100

0.001

100

0.01

0.1

150

200

250

300

350

AD7495 5V

SCLK = 20MHz

AD7495 3V

SCLK = 20MHz

AD7475 5V

SCLK = 20MHz

AD7475 3V

SCLK = 20MHz

Figure 24. Power vs. Throughput for Partial Power Down

For example, if the AD7495 is operated in a continuous

sampling mode with a throughput rate of 100 kSPS and an

SCLK of 20 MHz (VDD = 5 V), and the device is placed in partial

power-down mode between conversions, then the power

consumption is calculated as follows. The maximum power

dissipation during normal operation is 13 mW (VDD = 5 V). If

the power-up time from partial power-down is one dummy

cycle, that is, 1 μs, and the remaining conversion time is another

cycle, that is, 1 μs, then the AD7495 can be said to dissipate

13 mW for 2 μs during each conversion cycle. For the

remainder of the conversion cycle, 8 μs, the part remains in

partial power-down mode. The AD7495 dissipates 1.15 mW for

the remaining 8 μs of the conversion cycle. If the throughput

rate is 100 kSPS, and the cycle time is 10 μs, the average power

dissipated during each cycle is (2/10) × (13 mW) + (8/10) ×

(1.15 mW) = 3.52 mW. If VDD = 3 V, SCLK = 20 MHz and the

device is again in partial power-down mode between conver-

sions, the power dissipated during normal operation is 6 mW.

The AD7495 dissipates 6 mW for 2 μs during each conversion

cycle and 0.69 mW for the remaining 8 μs where the part is in

partial power-down. With a throughput rate of 100 kSPS, the

average power dissipated during each conversion cycle is (2/10)

× (6 mW) + (8/10) × (0.69 mW) = 1.752 mW. Figure 24 shows

the power vs. throughput rate when using partial power-down

mode between conversions with both 5 V and 3 V supplies for

both the AD7475 and AD7495. For the AD7475, partial power-

down current is lower than that of the AD7495.

Full power-down mode is intended for use in applications with

slower throughput rates than required for partial power-down

mode. It is necessary to leave 650 μs for the AD7495 to be fully

powered up from full power-down before initiating a conver-

sion. Current consumptions between conversions is typically

less than 1 μA.

Figure 25 shows a typical graph of current vs. throughput for

the AD7495 while operating in different modes. At slower

throughput rates, for example, 10 SPS to 1 kSPS, the AD7495

was operated in full power-down mode. As the throughput rate

increased, up to 100 kSPS, the AD7495 was operated in partial

power-down mode, with the part being powered down between

conversions. With throughput rates from 100 kSPS to 1 MSPS,

the part operated in normal mode, remaining fully powered up

at all times.

THROUGHPUT (SPS)

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

100

10k

100k

VDD = 5V

FULL

POWER-DOWN

PARTIAL

POWER-DOWN

NORMAL

Figure 25. Typical AD7495 Current vs. Throughput

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