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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADL5372ACPZ-R71 датащи(PDF) 16 Page - Analog Devices |
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ADL5372ACPZ-R71 датащи(HTML) 16 Page - Analog Devices |
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16 / 24 page  ADL5372 Rev. 0 | Page 16 of 24 WCDMA OPERATION The ADL5372 is suitable for operation in a WCDMA environment, providing better than 72.5 dB of adjacent channel power ratio (ACPR) at an output power of −10 dBm, with a 20 MHz noise floor of −157 dBm/Hz. Figure 36 and Figure 37 show the ACPR and 20 MHz offset noise floor of the ADL5372 vs. the output power at LO frequencies of 1966 MHz and 2140 MHz, respectively. POUT (dBm) –14 –13 –12 –11 –10 –9 –8 –7 ADJACENT CPR ALTERNATE CPR 20MHz NOISE FLOOR –82 –80 –78 –76 –74 –72 –70 –158.5 –158.0 –157.5 –157.0 –156.5 –156.0 –155.5 Figure 36. WCDMA Adjacent and Alternate Channel Power ratios and 20 MHz Offset Noise Floor vs. Output Power at 1966 MHz; LO Power = 0 dBm POUT (dBm) –14 –13 –12 –11 –10 –9 –8 –7 ADJACENT CPR ALTERNATE CPR 20MHz NOISE FLOOR –82 –80 –78 –76 –74 –72 –70 –158.5 –158.0 –157.5 –157.0 –156.5 –156.0 –155.5 Figure 37. WCDMA Adjacent and Alternate Channel Power and 20 MHz Offset Noise Floor vs. Output Power at 2140 MHz; LO Power = 0 dBm WiMAX OPERATION Figure 38 demonstrates the ACPR vs. the output power for the ADL5372 at 2350 MHz. The following test conditions were applied: a 10 MHz wide 64-QAM OFDM signal with 256 subcarriers, and a raised cosine filter with an α = 0.2. OUTPUT POWER (dBm) –72 –58 –16 –14 –12 –10 –8 –6 –4 –2 –160 –153 –70 –68 –66 –64 –62 –60 –159 –158 –157 –156 –155 –154 ACPR 70MHz OFFSET NOISE FLOOR Figure 38. WiMAX ACPR and Noise Floor vs. Output Power at 2350 MHz; LO Power = 0 dBm LO GENERATION USING PLLS Analog Devices has a line of PLLs that can be used for generating the LO signal. Table 4 lists the PLLs together with their maximum frequency and phase noise performance. Table 4. Analog Devices PLL Selection Table Part Frequency FIN (MHz) Phase Noise @ 1 kHz Offset and 200 kHz PFD (dBc/Hz) ADF4110 550 −91 @ 540 MHz ADF4111 1200 −87 @ 900 MHz ADF4112 3000 −90 @ 900 MHz ADF4113 4000 −91 @ 900 MHz ADF4116 550 −89 @ 540 MHz ADF4117 1200 −87 @ 900 MHz ADF4118 3000 −90 @ 900 MHz The ADF4360 comes as a family of chips, with nine operating frequency ranges. One is chosen, depending on the local oscillator frequency required. While the use of the integrated synthesizer may come at the expense of slightly degraded noise performance from the ADL5372, it can be a cheaper alternative to a separate PLL and VCO solution. Table 5 shows the options available. Table 5. ADF4360 Family Operating Frequencies Part Output Frequency Range (MHz) ADF4360-0 2400 to 2725 ADF4360-1 2050 to 2450 ADF4360-2 1850 to 2150 ADF4360-3 1600 to 1950 ADF4360-4 1450 to 1750 ADF4360-5 1200 to 1400 ADF4360-6 1050 to 1250 ADF4360-7 350 to 1800 ADF4360-8 65 to 400 |
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