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AD9752 датащи(PDF) 10 Page - Analog Devices |
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AD9752 датащи(HTML) 10 Page - Analog Devices |
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10 / 23 page ![]() REV. 0 AD9752 –10– REFERENCE OPERATION The AD9752 contains an internal 1.20 V bandgap reference that can easily be disabled and overridden by an external refer- ence. REFIO serves as either an input or output depending on whether the internal or an external reference is selected. If REFLO is tied to ACOM, as shown in Figure 18, the internal reference is activated and REFIO provides a 1.20 V output. In this case, the internal reference must be compensated externally with a ceramic chip capacitor of 0.1 µF or greater from REFIO to REFLO. Also, REFIO should be buffered with an external amplifier having an input bias current less than 100 nA if any additional loading is required. 150pF +1.2V REF AVDD REFLO CURRENT SOURCE ARRAY +5V REFIO FS ADJ 2k 0.1 F AD9752 ADDITIONAL LOAD OPTIONAL EXTERNAL REF BUFFER Figure 18. Internal Reference Configuration The internal reference can be disabled by connecting REFLO to AVDD. In this case, an external reference may then be applied to REFIO as shown in Figure 19. The external reference may provide either a fixed reference voltage to enhance accuracy and drift performance or a varying reference voltage for gain control. Note that the 0.1 µF compensation capacitor is not required since the internal reference is disabled, and the high input im- pedance (i.e., 1 M Ω) of REFIO minimizes any loading of the external reference. 150pF +1.2V REF AVDD REFLO CURRENT SOURCE ARRAY AVDD REFIO FS ADJ RSET AD9752 EXTERNAL REF IREF = VREFIO/RSET AVDD REFERENCE CONTROL AMPLIFIER VREFIO Figure 19. External Reference Configuration REFERENCE CONTROL AMPLIFIER The AD9752 also contains an internal control amplifier that is used to regulate the DAC’s full-scale output current, IOUTFS. The control amplifier is configured as a V-I converter as shown in Figure 19, such that its current output, IREF, is determined by the ratio of the VREFIO and an external resistor, RSET, as stated in Equation 4. IREF is copied over to the segmented current sources with the proper scaling factor to set IOUTFS as stated in Equation 3. The control amplifier allows a wide (10:1) adjustment span of IOUTFS over a 2 mA to 20 mA range by setting IREF between 62.5 µA and 625 µA. The wide adjustment span of I OUTFS provides several application benefits. The first benefit relates directly to the power dissipation of the AD9752, which is proportional to IOUTFS (refer to the Power Dissipation section). The second benefit relates to the 20 dB adjustment, which is useful for system gain control purposes. The small signal bandwidth of the reference control amplifier is approximately 0.5 MHz. The output of the control amplifier is internally compensated via a 150 pF capacitor that limits the control amplifier small-signal bandwidth and reduces its output impedance. Since the –3 dB bandwidth corresponds to the dominant pole, and hence the time constant, the settling time of the control amplifier to a stepped reference input re- sponse can be approximated. In this case, the time constant can be approximated to be 320 ns. There are two methods in which IREF can be varied for a fixed RSET. The first method is suitable for a single-supply system in which the internal reference is disabled, and the common-mode voltage of REFIO is varied over its compliance range of 1.25 V to 0.10 V. REFIO can be driven by a single-supply amplifier or DAC, thus allowing IREF to be varied for a fixed RSET. Since the input impedance of REFIO is approximately 1 M Ω, a simple, low cost R-2R ladder DAC configured in the voltage mode topology may be used to control the gain. This circuit is shown in Figure 20 using the AD7524 and an external 1.2 V reference, the AD1580. 1.2V 150pF +1.2V REF AVDD REFLO CURRENT SOURCE ARRAY AVDD REFIO FS ADJ RSET AD9752 IREF = VREF/RSET AVDD VREF VDD RFB OUT1 OUT2 AGND DB7–DB0 AD7524 AD1580 0.1V TO 1.2V Figure 20. Single-Supply Gain Control Circuit |
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