 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
MPC8358ECVVADDGA датащи(PDF) 24 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8358ECVVADDGA датащи(HTML) 24 Page - Freescale Semiconductor, Inc |
|
|
24 / 102 page  MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5 24 Freescale Semiconductor DDR and DDR2 SDRAM AC Electrical Characteristics This figure provides the AC test load for the DDR bus. Figure 8. DDR AC Test Load This figure shows the DDR SDRAM output timing diagram for source synchronous mode. Figure 9. DDR SDRAM Output Timing Diagram for Source Synchronous Mode Table 22. DDR and DDR2 SDRAM Measurement Conditions Symbol DDR DDR2 Unit Notes VTH MVREF ± 0.31 V MVREF ± 0.25 V V 1 VOUT 0.5 × GVDD 0.5 × GVDD V 2 Notes: 1. Data input threshold measurement point. 2. Data output measurement point. Output Z0 = 50 Ω GVDD/2 RL = 50 Ω ADDR/CMD tDDKHAS, tDDKHCS tDDKHMH tDDKLDS tDDKHDS MDQ[x] MDQS[n] MCK[n] MCK[n] tMCK tDDKLDX tDDKHDX D1 D0 Write A0 NOOP tDDKHME tDDKHMP tDDKHAX, tDDKHCX |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
