6

®

PCM63P

FIGURE 1. Production THD+N Test Setup.

Colinear architecture of the PCM63P, with its ideal

performance around bipolar zero, provides a more usable

dynamic range, even using the strict audio definition, than

any previously available D/A converter.

Level Linearity

Deviation from ideal versus actual signal level is sometimes

called “level linearity” in digital audio converter testing. See

the “–90dB Signal Spectrum” plot in the Typical Perfor-

mance Curves section for the power spectrum of a PCM63P

at a –90dB output level. (The “–90dB Signal” plot shows the

actual –90dB output of the DAC). The deviation from ideal

for PCM63P at this signal level is typically less than

±0.3dB.

For the “–110dB Signal” plot in the Typical Performance

Curves section, true 20-bit digital code is used to generate a

–110dB output signal. This type of performance is possible

only with the low-noise, near-theoretical performance around

bipolar zero of the PCM63P’s Colinear DAC circuitry.

A commonly tested digital audio parameter is the amount of

deviation from ideal of a 1kHz signal when its amplitude is

decreased from –60dB to –120dB. A digitally dithered input

signal is applied to reach effective output levels of –120dB

using only the available 16-bit code from a special compact

disk test input. See the “16-Bit Level Linearity” plot in the

Typical Performance Curves section for the results of a

PCM63P tested using this 16-bit dithered fade-to-noise

signal. Note the very small deviation from ideal as the signal

goes from –60dB to –100dB.

DC SPECIFICATIONS

Idle Channel SNR

Another appropriate specification for a digital audio con-

verter is idle channel signal-to-noise ratio (idle channel

SNR). This is the ratio of the noise on the DAC output at

bipolar zero in relation to the full scale range of the DAC. To

make this measurement, the digital input is continuously fed

the code for bipolar zero while the output of the DAC is

band-limited from 20Hz to 20kHz and an A-weighted filter

is applied. The idle channel SNR for the PCM63P is typi-

cally greater than 120dB, making it ideal for low-noise

applications.

Monotonicity

Because of the unique dual-DAC Colinear architecture of

the PCM63P, increasing values of digital input will always

result in increasing values of DAC output as the signal

moves away from bipolar zero in one-LSB steps (in either

direction). The “16-Bit Monotonicity” plot in the Typical

Performance Curves section was generated using 16-bit

digital code from a test compact disk. The test starts with 10

periods of bipolar zero. Next are 10 periods of alternating

1LSBs above and below zero, and then 10 periods of

alternating 2LSBs above and below zero, and so on until

10LSBs above and below zero are reached. The signal

pattern then begins again at bipolar zero.

With PCM63P, the low-noise steps are clearly defined and

increase in near-perfect proportion. This performance is

achieved without any external adjustments. By contrast,

sigma-delta (“Bitstream”, “MASH”, or 1-bit DAC) architec-

tures are too noisy to even see the first 3 or 4 bits change (at

16 bits), other than by a change in the noise level.

Absolute Linearity

Even though absolute integral and differential linearity specs

are not given for the PCM63P, the extremely low THD+N

performance is typically indicative of 16-bit to 17-bit inte-

gral linearity in the DAC, depending on the grade specified.

The relationship between THD+N and linearity, however, is

not such that an absolute linearity specification for every

individual output code can be guaranteed.

Distortion

Analyzer

Use 400Hz High-Pass

Filter and 30kHz

Low-Pass Filter

Meter Settings

Programmable

Gain Amp

0dB to 60dB

Low-Pass

Filter

40kHz 3rd Order

GIC Type

DUT

(PCM63P)

Parallel-to-Serial

Conversion

Digital Code

(EPROM)

Binary

Counter

Timing

Logic

Clock

Latch Enable

Sampling Rate = 44.1kHz x 8 (352.8kHz)

Output Frequency = 991Hz

(Shiba Soku Model

725 or Equivalent)

I to V

Converter

OPA627