LM98555 datasheet(5/15 Pages) TI

5 / 15 page

LM98555

www.ti.com

SNAS290D – DECEMBER 2005 – REVISED APRIL 2013

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

Supply Voltage

−0.5V to 6.2V

Package Power Rating at 25°C(3)

2.0 Watts

Voltage on Any Input or Output Pin

−0.5V to VDD+0.5V

DC Input Current at Any Pin

25 mA

DC Package Input Current

50 mA

Storage Temperature

−65°C to +150°C

Lead temperature (Soldering, 10 sec.)

300°C

Human Body Model

2000V

ESD Susceptibility

Machine Model

200V

(1)

Absolute maximum ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that

the device should be operated at these limits.

(2)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3)

Package power rating assumes the exposed thermal pad is soldered to the printed circuit board as recommended, with significant heat

spreading provided by vias to internal or bottom heat dissipation planes or pad. If this is not the case, then the package power rating

should be reduced. See THERMAL GUIDELINES in Application Information for more information.

Operating Conditions

Supply Voltage

VDDI

+3.0V to +5.5V

Supply Voltage

VDDO

+4.5V to +5.8V

Supply Sequencing(1)

VDDI < VDDO+0.2V

Ambient Temperature (TA)

0 to 70°C

Operating Frequency

30 MHz

Power Dissipation(2)

2.0W

(1)

When powering up and down, transient voltage levels on VDDI must be lower than (VDDO + 0.2V)

(2)

This is the power dissipated on-chip due to all currents flowing through the device - both DC and AC. This operating condition will be

violated if all driver outputs are fully loaded and operating at the same time at the rated FMAX. The system design must constrain the

chip's operating conditions (loads, power supply, number of parallel drivers enabled, frequency of operation) to make certain that this

limit is never exceeded.

Package Thermal Resistances

Package

θJ-A

(1)

θJ-PAD

(Thermal Pad)

64-Lead HTSSOP

36.8°C / W

6.2°C / W

(1)

Package thermal resistance for junction to ambient is based on a 5.5 inch by 3 inch, 4 layer printed circuit board, with thermal vias

connecting the heat sinking pad to a full internal ground plane. Tests were done in still air, with a power dissipation of 2.0 W, at an

ambient temperature of 22°C.

DC Electrical Characteristics

The following specifications apply for GND = 0V, VDDI = 3.3V, VDDO = 5.0V, unless noted otherwise. Boldface limits apply

for TA= TMIN to TMAX; all other limits TA= 25°C

Parameter

Test Conditions

Min

Typical

Max

Units

Logic 1 Input Current

VI = VDDI

-1

0.004

µA

Logic 0 Input Current

VI = GNDI

-1

0.006

µA

VIT

Input Threshold

VDDI = 3.3V

1.41

1.57

1.75

Input Threshold

VDDI = 5.0V

2.48

Input Threshold Hysteresis

VDDI = 3.3V

-72

100

ΔVIT

Input Threshold Variation

Between P1A, P2A inputs

-100

100

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