LT3797 datasheet(13/36 Pages) LINER

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LT3797

3797f

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APPLICATIONS INFORMATION

Switching Frequency and Synchronization

The RT frequency adjust pin allows the user to program

the switching frequency (fSW) from 100kHz to 1MHz to

optimize efficiency/performance or external component

size. Higher frequency operation yields smaller compo-

nent size but increases switching losses and gate driving

current, and may not allow sufficiently high or low duty

cycle operation. Lower frequency operation gives higher

efficiency, achieves higher maximum duty cycle or lower

minimum duty cycle at the cost of larger external compo-

nent size. An external resistor from the RT pin to GND is

required—do not leave this pin open. For an appropriate

RT resistor value see Table 1.

Table 1. Switching Frequency (fSW) vs RT Value

fSW (kHz)

RT (kΩ)

fSW (kHz)

RT (kΩ)

100

154

600

22.6

150

102

650

20.5

200

75.0

700

17.4

250

59.0

750

19.1

300

48.7

800

16.2

350

41.2

850

15.0

400

35.7

900

14.0

450

31.6

950

13.3

500

28.0

1000

12.4

550

24.9

TheoperatingfrequencyoftheLT3797canbesynchronized

to an external clock source. By providing a digital clock

signal into the SYNC pin, the LT3797 will operate at the

SYNCclockfrequency.Ifthisfeatureisused,anRTresistor

should be chosen to program a switching frequency 20%

slower than SYNC pulse frequency. Tie the SYNC pin to

GND if this feature is not used.

Duty Cycle Considerations

Switching duty cycle is a key variable defining converter

operation, therefore, its limits must be considered when

programming the switching frequency for a particular ap-

plication. The minimum duty cycle of the switch is limited

by the fixed minimum on-time (200ns maximum) and the

switchingfrequency(fSW).Themaximumdutycycleofthe

switch is limited by the fixed minimum off-time (200ns

maximum) and fSW. The following equations express the

minimum/maximum duty cycle:

Minimum Duty Cycle = 200ns • fSW

Maximum Duty Cycle = 1 – 200ns • fSW

Besides the limitation by the minimum off-time, it is also

recommended to choose the maximum duty cycle below

95%.

PWM Dimming Control

The LED of each channel can be dimmed with pulse width

modulation using the PWM pin. Figure 1 shows the chan-

nel 1 driver. If the PWM1 pin is pulled high, M2 is turned

on by G3 and G4. Converter 1 operates normally. G4 limits

ISP1-TG1 to 6.5V to protect the gate of M2. If the PWM1

pin is pulled low, the external NMOS M1 is turned off

through G1 etc, and converter 1 stops operating. M2 is

turned off through the TG1 pin, disconnecting LED1 and

stoppingcurrentdrawingfromoutputcapacitor,COUT.The

VC1 pin is also disconnected from the internal circuitry

through S1. The capacitors CC and COUT store the state

of the LED string current until PWM1 is pulled up again.

This leads to a highly linear relationship between PWM

duty cycle and output light (brightness), and allows for

a large and accurate dimming range. The PWM dimming

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