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APPLICATION INFORMATION

Typical Circuit Connection Diagram

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19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

PCM1802

AGND

PDWN

BYPAS

FSYNC

LRCK

MODE1

DGND

MODE0

FMT1

FMT0

OSR

DOUT

BCK

SCKI

+

Oversampling

System Clock

L-Ch IN

R-Ch IN

0 V

5 V

Power Down

LCF Bypass

Control

+

L/R Clock

Frame Sync.

Audio Data

Processor

Mode [1:0]

Format [1:0]

3.3 V

0 V

Data Clock

Data Out

Control

S0026-02

+

+

+

+

PCM1802

SLES023C – DECEMBER 2001 – REVISED JANUARY 2005

Figure 29 illustrates a typical circuit connection diagram in which the cutoff frequency of the input HPF is about

8 Hz.

(1)

requires a power-on settling time with a 20-ms time constant during the power-on initialization period.

(2)

(3)

(4)

capacitor are not required for a clean analog supply.

(5)

analog supply.

Figure 29. Typical Circuit Connection

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