LMC6041IM datasheet(2/23 Pages) TI

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LMC6041

SNOS610E – DECEMBER 1994 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

Differential Input Voltage

±Supply Voltage

Supply Voltage (V+

− V−)

16V

Output Short Circuit to V−

See(3)

Output Short Circuit to V+

See(4)

Lead Temperature

(Soldering, 10 sec.)

260°C

Storage Temperature Range

−65°C to +150°C

Junction Temperature

110°C

ESD Tolerance(5)

500V

Current at Input Pin

±5 mA

Current at Output Pin

±18 mA

Current at Power Supply Pin

35 mA

Voltage at Input/Output Pin

(V+) + 0.3V, (V−)

− 0.3V

Power Dissipation

See(6)

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating conditions indicate conditions for

which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test

conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.

(2)

If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(3)

Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in

exceeding the maximum allowed junction temperature of 110°C. Output currents in excess of ±30 mA over long term may adversely

affect reliability.

(4)

Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.

(5)

Human body model, 1.5 k

Ω in series with 100 pF.

(6)

The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient

temperature is PD = (TJ(max) − TA)/θJA.

Operating Ratings

Temperature Range

LMC6041AI, LMC6041I

−40°C ≤ TJ ≤ +85°C

Supply Voltage

4.5V

≤ V+ ≤ 15.5V

Power Dissipation

See(1)

Thermal Resistance (

θJA)

(2)

8-Pin PDIP package

101°C/W

8-Pin SOIC package

165°C/W

(1)

For operating at elevated temperatures the device must be derated based on the thermal resistance

θJA with PD = (TJ − TA)/θJA.

(2)

All numbers apply for packages soldered directly into a PC board.

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