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LM5107SD датащи(PDF) 3 Page - Texas Instruments |
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LM5107SD датащи(HTML) 3 Page - Texas Instruments |
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3 / 18 page ![]() LM5107 www.ti.com SNVS333D – NOVEMBER 2004 – REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VDD to VSS -0.3V to 18V HB to HS −0.3V to 18V LI or HI to VSS −0.3V to VDD +0.3V LO to VSS −0.3V to VDD +0.3V HO to VSS VHS −0.3V to VHB +0.3V HS to VSS (3) −5V to 100V HB to VSS 118V Junction Temperature -40°C to +150°C Storage Temperature Range −55°C to +150°C ESD Rating HBM(4) 2 kV (1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test conditions, see the Electrical Characteristics . (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. (3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD = 10V, the negative transients at HS must not exceed -5V. (4) The human body model is a 100 pF capacitor discharged through a 1.5k Ω resistor into each pin. Pin 6 , Pin 7 and Pin 8 are rated at 500V. Recommended Operating Conditions VDD 8V to 14V HS(1) −1V to 100V HB VHS +8V to VHS +14V HS Slew Rate < 50 V/ns Junction Temperature −40°C to +125°C (1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD = 10V, the negative transients at HS must not exceed -5V. Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM5107 |
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