LTC3530

7

3530fb

The LTC3530 provides high efficiency, low noise power

for a wide variety of handheld electronic devices. The

LTC proprietary topology allows input voltages above,

below or equal to the output voltage by properly phasing

determines the output duty cycle of the switches. Since

low gate charge synchronous switches provide high fre-

quency pulse width modulation control at high efficiency.

High efficiency is achieved at light loads when Burst Mode

operation is entered and the LTC3530’s quiescent current

drops to a low 40μA.

LOW NOISE FIXED FREQUENCY OPERATION

Oscillator

The frequency of operation is programmed by an external

equation:

33,170

Error Amp

The error amplifier is a voltage mode amplifier. The loop

compensation components are configured around the

For improved bandwidth, an additional R-C feed-forward

network can be placed across the upper feedback divider

resistor. The voltage on SHDN/SS clamps the error amp

Internal Current Limit

There are two different current limit circuits in the LTC3530.

Each has internally fixed thresholds which vary inversely

The first circuit is a high speed peak current limit compara-

tor that will shut off switch A once the current exceeds

2.5A typical. The delay to output of this comparator is

typically 50ns.

A second amplifier will source current out of FB to drop

the output voltage once the peak input current exceeds

2A typical. This method provides a closed loop means of

is near ground, such as during a short-circuit or during

startup, this threshold is cut to 670mA (typ), providing a

foldback feature. For this current limit feature to be most

effective, the Thevenin resistance from FB to ground should

be greater than 100kΩ.

Reverse Current Limit

During fixed frequency operation, the LTC3530 operates

in forced continuous conduction mode. The reverse cur-

rent limit amplifier monitors the inductor current from

the output through switch D. Once the negative inductor

current exceeds 640mA typical, the LTC3530 will shut off

switch D.

Four-Switch Control

Figure 1 shows a simplified diagram of how the four in-

and GND. Figure 2 shows the regions of operation for the

3

SW1

4

SW2

PMOS A

NMOS B

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PMOS D

NMOS C

3530 F01

6

85%

BOOST

BOOST

BUCK

DUTY

CYCLE

0%

V4 (≈1.5V)

V3 (≈1.15V)

BOOST REGION

BUCK REGION

BUCK/BOOST REGION

V2 (≈1V)

V1 (≈0.7V)

3530 F02

A ON, B OFF

PWM CD SWITCHES

D ON, C OFF

PWM AB SWITCHES

FOUR SWITCH PWM

INTERNAL

CONTROL

Figure 1. Simplified Diagram of Output Switches

OPERATION