AD5247

Data Sheet

Rev. F | Page 18 of 20

OUTLINE DIMENSIONS

1.30 BSC

COMPLIANT TO JEDEC STANDARDS MO-203-AB

1.00

0.90

0.70

0.46

0.36

0.26

2.20

2.00

1.80

2.40

2.10

1.80

1.35

1.25

1.15

0.10 MAX

1.10

0.80

0.40

0.10

0.22

0.08

3

12

4

6

5

0.65 BSC

COPLANARITY

0.10

SEATING

PLANE

0.30

0.15

Figure 42. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]

(KS-6)

Dimensions shown in millimeters

ORDERING GUIDE

Model1

Temperature Range

Package Description2

Package

Option

Branding

AD5247BKSZ5-RL7

5

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

D96

AD5247BKSZ10-RL7

10

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

D95

AD5247BKSZ10-1RL7

10

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

D5E

AD5247BKSZ10-2RL7

10

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

DAK

AD5247BKSZ50-RL7

50

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

D97

AD5247BKSZ100-R2

100

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

D98

AD5247BKSZ100-RL7

100

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

D98

AD5247BKSZ100-1RL7

100

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

DAJ

AD5247BKSZ100-2RL7

100

–40°C to +125°C

6-lead Thin Shrink Small Outline Transistor Package [SC70]

KS-6

DAL

EVAL-AD5247DBZ

Evaluation Board