AD5560JBCZ datasheet(48/68 Pages) AD

48 / 68 page

AD5560

Data Sheet

Rev. D | Page 48 of 68

Table 19. DPS Register 2

Address

Default

Data Bits, MSB First

0x3

0x0000

Bit

Name

Function

SF0

System force and sense line addressing, SF0. Bit SF0 addresses each of the different

combinations of switching the system force and sense lines to the force and sense pins at the

DUT.

Guard High-Z

(Bit 7)

SFO

SYS_SENSE Pin

SYS_FORCE Pin

GUARD/SYS_DUTGND Pin

Open

Guard

Sense

Force

Guard

Open

Sense

Force

DUTGND

SR[2:0]

Slew rate control, SR2, SR1, SR0. Selects the slew rate for the main DAC output amp.

Action

1 V/μs

0.875 V/μs

0.75 V/μs

0.62 V/μs

0.5 V/μs

0.43 V/μs

0.35 V/μs

0.3125 V/μs

GPO

General purpose output bit. The GPO bit can be used for any function, such as disconnecting

the decoupling capacitor to help speed up low current testing.

SLAVE,

GANGIMODE

Ganging multiple devices increases the current drive available. Use these bits to enable

selection of the ganging mode and place the device in slave or master mode. In default

operation, each device is a master (gang of one). Figure 54 shows how the device is configured

in this mode.

SLAVE

Action

Master: MASTER_OUT = internally connects to active EXTFORCE1/

EXTFORCE2 output

Master: MASTER_OUT = master MI

SLAVE FV to EXTFORCE1/EXTFORCE2 connected internally to close the

FVAMP loop

SLAVE FI

INT10K

Setting this bit high allows the user to connect an internal sense short resistor of 10 kΩ

between the force and the sense lines (closes SW11). This resistor is actually made up of series

4 kΩ resistors followed by a 2 kΩ switch and another 4 kΩ resistor. There is a 10 kΩ resistor that

can be connected between the FORCE and SENSE pins by use of SW11. This 10 kΩ resistor is

intended to maintain a force/sense connection when a DUT is not in place. It is not intended

to be connected when measurements are being made because this defeats the purpose of the

OSD circuit in identifying an open circuit between FORCE and SENSE. In addition, the sense

path has a 2.5 kΩ resistor in series; therefore, if the 10 kΩ switch is closed, errors may become

apparent when in high current ranges.

Guard high-Z

Set this bit high to high-Z the guard amplifier. This is required if using the GUARD/

SYS_DUTGND pin in the SYS_DUTGND function.

6:0

Unused

Set to 0.

AD5560JBCZ датащи(PDF) 48 Page - Analog Devices

AD5560JBCZ датащи(HTML) 48 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

датащи скачать

ссылки URL