LMV331-N, LMV339-N, LMV393-N

SNOS018G – AUGUST 1999 – REVISED FEBRUARY 2013

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OR GATES

A three input OR gate is achieved from the basic AND gate simply by increasing the resistor value connected

A logic "1" at any of the inputs will produce a logic "1" at the output.

Figure 24. OR Gate

ORing THE OUTPUT

By the inherit nature of an open collector comparator, the outputs of several comparators can be tied together

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