AD7671AST datasheet(5/24 Pages) AD

5 / 24 page

REV. B

AD7671

–5–

PIN CONFIGURATION

ST-48 and CP-48

13 14 15 16 17 18 19 20 21 22 23 24

48 47 46 45 44

39 38 37

43 42 41 40

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

AGND

CNVST

RESET

DGND

AGND

AVDD

BYTESWAP

OB/

WARP

IMPULSE

NC = NO CONNECT

SER/

PAR

D2/DIVSCLK[0]

BUSY

D15

D14

D13

AD7671

D3/DIVSCLK[1]

D12

ABSOLUTE MAXIMUM RATINGS

Analog Inputs

IND

2, INC2, INB2 . . . . . . . . . . . . . . . . . . . . –11 V to +30 V

INA, REF, INGND, REFGND, AGND

. . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to AVDD + 0.3 V

Ground Voltage Differences

AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . . .

±0.3 V

Supply Voltages

AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . . –0.3 V to +7 V

AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . .

±7 V

DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

Digital Inputs . . . . . . . . . . . . . . . . –0.3 V to DVDD + 0.3 V

Internal Power Dissipation

. . . . . . . . . . . . . . . . . . . . 700 mW

Internal Power Dissipation

. . . . . . . . . . . . . . . . . . . . . . 2.5 W

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150

∞C

Storage Temperature Range . . . . . . . . . . . . –65

∞C to +150∞C

Lead Temperature Range

(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300

∞C

NOTES

1Stresses above those listed under Absolute Maximum Ratings may cause permanent

damage to the device. This is a stress rating only; functional operation of the device

at these or any other conditions above those indicated in the operational section of

this specification is not implied. Exposure to absolute maximum rating conditions

for extended periods may affect device reliability.

2 See Analog Inputs section.

3 Specification is for device in free air: 48-Lead LQFP:

qJA = 91∞C/W, qJC = 30∞C/W.

4 Specification is for device in free air: 48-Lead LFCSP:

qJA = 26∞C/W.

IOH

500 A

1.6mA

IOL

TO OUTPUT

1.4V

*IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND

SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD

CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM.

60pF*

Figure 1. Load Circuit for Digital Interface Timing,

SDOUT, SYNC, SCLK Outputs, CL = 10 pF

ORDERING GUIDE

Model

Temperature Range

Package Description

Package Option

AD7671AST

–40

∞C to +85∞CQuad Flatpack (LQFP)

ST-48

AD7671ASTRL

–40

∞C to +85∞CQuad Flatpack (LQFP)

ST-48

AD7671ACP

–40

∞C to +85∞CChip Scale (LFCSP)

CP-48

AD7671ACPRL

–40

∞C to +85∞CChip Scale (LFCSP)

CP-48

EVAL-AD7671CB

Evaluation Board

EVAL-CONTROL BRD2

Controller Board

NOTES

1This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes.

2This board allows a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.

DELAY

0.8V

Figure 2. Voltage Reference Levels for Timing

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the AD7671 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are

recommended to avoid performance degradation or loss of functionality.

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