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Functional Description

Configuration Devices for SRAM-Based LUT Devices

January 2012

Altera Corporation

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5.0-V and 3.3-V in-system programmability (ISP) through the built-in IEEE Std.

1149.1 JTAG interface

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Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1

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Test and Programming Language (STAPL) Format File (.jam), JAM Byte Code File

cable

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Supports programming through Programmer Object File (.pof) for EPC1 and

EPC1441 devices

_CONF pin allows INIT_CONF JTAG instruction to begin FPGA configuration

Enhanced Configuration (EPC) Devices Datasheet.

Configuration (EPCS) Devices Datasheet.

Functional Description

With SRAM-based devices, configuration data must be reloaded each time the device

powers up, the system initializes, or when new configuration data is needed. Altera

configuration devices store configuration data for SRAM-based ACEX 1K, APEX 20K,

APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix,

Stratix GX, Stratix II, and Stratix II GX devices.

Table 2 lists the supported configuration devices required to configure the ACEX 1K,

FLEX 10KA, FLEX 10KE, FLEX 6000/A, FLEX 8000A, Mercury, Stratix, Stratix GX, or

Stratix II device.

Table 2. Supported Configuration Devices (Part 1 of 4)

Device Family

Device

Data Size (Bits)

(1)

EPC1064 or

EPC1064V

EPC1213

EPC1441

EPC1

EPC2

ACEX 1K

EP1K10

159,160

—

—

1

1

1

EP1K30

473,720

—

—

—

1

1

EP1K50

784,184

—

—

—

1

1

EP1K100

1,335,720

—

—

—

—

1

APEX 20K

EP20K100

993,360

—

—

—

1

1

EP20K200

1,950,800

—

—

—

—

2

EP20K400

3,880,720

—

—

—

—

3

APEX 20KC

EP20K200C

1,968,016

—

—

—

—

2

EP20K400C

3,909,776

—

—

—

—

3

EP20K600C

5,673,936

—

—

—

—

4

EP20K1000C

8,960,016

—

—

—

—

6