MCP4341104ESLASHML datasheet(35/80 Pages) MICROCHIP

35 / 80 page

DS22233A-page 35

MCP434X/436X

bit 3

WL1: WiperLock Status bit for Resistor Network 1 (Refer to Section 5.3 “WiperLock™ Technology”

for further information)

The WiperLock Technology bit (WL1) prevents the Volatile and Non-Volatile Wiper 1 addresses and the

TCON0 register bits R1HW, R1A, R1W, and R1B from being written to. High Voltage commands are

required to enable and disable WiperLock Technology.

Wiper and TCON0 register bits R1HW, R1A, R1W, and R1B of Resistor Network 1 (Pot 1) are

“Locked” (Write Protected)

Wiper and TCON0 of Resistor Network 1 (Pot 1) can be modified

Note:

The WL1 bit always reflects the result of the last programming cycle to the non-volatile WL1

bit. After a POR/BOR or RESET pin event, the WL1 bit is loaded with the non-volatile WL1

bit value.

bit 2

WL0: WiperLock Status bit for Resistor Network 0 (Refer to Section 5.3 “WiperLock™ Technology”

for further information)

The WiperLock Technology bit (WL0) prevents the Volatile and Non-Volatile Wiper 0 addresses and the

TCON0 register bits R0HW, R0A, R0W, and R0B from being written to. High Voltage commands are

required to enable and disable WiperLock Technology.

Wiper and TCON0 register bits R0HW, R0A, R0W, and R0B of Resistor Network 0 (Pot 0) are

“Locked” (Write Protected)

Wiper and TCON0 of Resistor Network 0 (Pot 0) can be modified

Note:

The WL0 bit always reflects the result of the last programming cycle to the non-volatile WL0

bit. After a POR/BOR or RESET pin event, the WL0 bit is loaded with the non-volatile WL0

bit value.

bit 1

Reserved: Forced to “1”

bit 0

WP: EEPROM Write Protect Status bit (Refer to Section “EEPROM Write Protect” for further

information)

This bit indicates the status of the write protection on the EEPROM memory. When Write Protect is

enabled, writes to all non-volatile memory are prevented. This includes the General Purpose EEPROM

memory, and the non-volatile Wiper registers. Write Protect does not block modification of the volatile

wiper register values or the volatile TCON0 and TCON1 register values (via Increment, Decrement, or

Write commands).

This status bit is an OR of the devices Write Protect pin (WP) and the internal non-volatile WP bit. High

Voltage commands are required to enable and disable the internal WP EEPROM bit.

EEPROM memory is Write Protected

EEPROM memory can be written

STATUS REGISTER (CONTINUED)

Note 1:

Requires a High Voltage command to modify the state of this bit (for Non-Volatile devices only). This bit is

Not directly written, but reflects the system state (for this feature).

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