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AV02-2299EN - December 29, 2009

Appendix B: Application circuit

APDS-9303

Pin 5

Pin 4

Pin 6

Pin 2: GND

0.1uF

Pin 3

** ADDR_SEL

INT

SDA

SCL

Pin 1

Pin 2

MCU

** Note:

ADDR_SEL Float : Slave address is 0111001

R1

R2

R3

Figure B1. Application circuit for APDS-9303

The power supply lines must be decoupled with a 0.1

uF capacitor placed as close to the device package as

possible, as shown in Figure B1. The bypass capacitor

should have low effective series resistance (ESR) and low

effective series inductance (ESI), such as the common

ceramic types, which provide a low impedance path to

ground at high frequencies to handle transient currents

caused by internal logic switching.

Pull-up resistors, R1 and R2, maintain the SDA and SCL

lines at a high level when the bus is free and ensure the

signals are pulled up from a low to a high level within

the required rise time. For a complete description of the

SMBus maximum and minimum Rp values, please review

the SMBus Specification at http://www.smbus.org/specs

A pull-up resistor, R3, is also required for the interrupt

(INT), which functions as a wired-AND signal in a similar

fashion to the SCL and SDA lines. A typical impedance

value between 10 k

Ω and 100 kΩ can be used.