OP179/OP279

–6–

REV. G

THEORY OF OPERATION

The OP179/OP279 is the latest entry in Analog Devices’ expand-

ing family of single-supply devices, designed for the multimedia

and telecom marketplaces. It is a high output current drive,

rail-to-rail input /output operational amplifier, powered from a

single 5 V supply. It is also intended for other low supply voltage

applications where low distortion and high output current drive

are needed. To combine the attributes of high output current

and low distortion in rail-to-rail input/output operation, novel

circuit design techniques are used.

For example, TPC 1 illustrates a simplified equivalent circuit for

the OP179/OP279’s input stage. It is comprised of two PNP

differential pairs, Q5-Q6 and Q7-Q8, operating in parallel, with

diode protection networks. Diode networks D5-D6 and D7-D8

serve to clamp the applied differential input voltage to the

OP179/OP279, thereby protecting the input transistors against

avalanche damage. The fundamental differences between these

two PNP gain stages are that the Q7-Q8 pair are normally OFF

and that their inputs are buffered from the operational amplifier

inputs by Q1-D1-D2 and Q9-D3-D4. Operation is best under-

stood as a function of the applied common-mode voltage: When

the inputs of the OP179/OP279 are biased midway between the

supplies, the differential signal path gain is controlled by the

resistively loaded (via R7, R8) Q5-Q6. As the input common-mode

input transistor current sources, I1 and I3, are forced into satura-

tion, thereby forcing the Q1-D1-D2 and Q9-D3-D4 networks

into cutoff; however, Q5-Q6 remain active, providing input stage

gain. On the other hand, when the common-mode input voltage

is increased toward the positive supply, Q5-Q6 are driven into

cutoff, Q3 is driven into saturation, and Q4 becomes active,

providing bias to the Q7-Q8 differential pair. The point at which

the Q7-Q8 differential pair becomes active is approximately equal

I2

R5

4k

D7

I1

R6

4k

D8

D5

D6

R3

2.5k

R4

2.5k

Q4

Q3

Q2

Q5

Q6

Q9

Q1

R1

6k

R2

3k

R7

2.2k

R8

2.2k

I3

D1

D2

D3

D4

–

+

IN–

IN+

Q8

Q7

Figure 1. OP179/OP279 Equivalent Input Circuit

The key issue here is the behavior of the input bias currents

in this stage. The input bias currents of the OP179/OP279 over

and Q9-Q6. Outside of this range, the input bias currents are

dominated by the base current sum of Q5-Q6 for input signals

in the OP179/OP279 not only exhibit different amplitudes, but

also exhibit different polarities. This input bias current behavior

is best illustrated in TPC 3. It is, therefore, of paramount

importance that the effective source impedances connected to

the OP179/OP279’s inputs are balanced for optimum dc and

ac performance.

100

60

0

10

10k

1k

100

1

40

20

80

FREQUENCY – Hz

5V

25 C

TPC 19. Voltage Noise Density vs.

Frequency

120

60

0

1k

1M

100k

10k

100

40

20

80

100

FREQUENCY – Hz

25 C

2.5V

TPC 21. Common-Mode

Rejection vs. Frequency

COMMON-MODE VOLTAGE – Volts

60

0

5

30

10

1

20

0

50

40

4

3

2

5V

25 C

FREQUENCY

1kHz

TPC 20. Voltage Noise Density vs.

Common-Mode Voltage