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AD9601 датащи(PDF) 21 Page - Analog Devices |
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AD9601 датащи(HTML) 21 Page - Analog Devices |
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21 / 32 page ![]() AD9601 Rev. 0 | Page 21 of 32 HARDWARE INTERFACE The pins described in Table 8 comprise the physical interface between the user’s programming device and the serial port of the AD9601. All serial pins are inputs, which is an open-drain output and should be tied to an external pull-up or pull-down resistor (suggested value of 10 kΩ). This interface is flexible enough to be controlled by either PROMS or PIC microcontrollers as well. This provides the user with an alternate method to program the ADC other than a SPI controller. If the user chooses not to use the SPI interface, some pins serve a dual function and are associated with a specific function when strapped externally to AVDD or ground during device power- on. The Configuration Without the SPI section describes the strappable functions supported on the AD9601. CONFIGURATION WITHOUT THE SPI In applications that do not interface to the SPI control registers, the SPI SDIO/DCS and SPI SCLK/DFS pins can alternately serve as standalone CMOS-compatible control pins. When the device is powered up, it is assumed that the user intends to use the pins as static control lines for the duty cycle stabilizer. In this mode, the SPI CSB chip select should be connected to ground, which disables the serial port interface. Table 9. Mode Selection Mnemonic External Voltage Configuration AVDD Duty cycle stabilizer enabled SPI SDIO/DCS AGND Duty cycle stabilizer disabled AVDD Twos complement enabled SPI SCLK/DFS AGND Offset binary enabled DON’T CARE DON’T CARE DON’T CARE DON’T CARE SDIO SCLK CSB tS tDH tHI tCLK tLO tDS tH R/W W1 W0 A12 A11 A10 A9 A8 A7 D5 D4 D3 D2 D1 D0 Figure 44. Serial Port Interface Timing Diagram |
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