Circuit Note

CN-0268

Rev. 0 | Page 3 of 6

AD9467 Source Impedance

The AD9467 is an ideal choice for an ADC in this circuit because it

is an IF sampling ADC optimized for high performance over

wide bandwidths and ease of use. The AD9467 has an integrated

buffer that presents a fixed input impedance to the driver amplifier.

This input structure is an advantage over ADCs that use an

unbuffered front end directly coupled to the sampling switches.

Unbuffered ADCs present time varying input sample-and-hold

impedances to the drive amplifier. The addition of the input

buffer eases the drive requirements at the expense of slightly

higher power consumption. The buffered source impedance of

the AD9467 is modeled as a fixed impedance of a 530 Ω resistance

in parallel with a 3.5 pF capacitance.

When interfacing to the ADC, it is recommended that the real

input impedance be reduced from 530 Ω to a lower value within

the 200 Ω to 400 Ω range. By lowering the input impedance of

the ADC, the kickback due to the sample-and-hold structure

settles out faster, yielding improved linearity performance. The

tradeoff is increased input power because more power is required

to drive the full scale of the ADC. In this circuit example, the

input impedance of the AD9467 was reduced to 200 Ω to match

the output impedance of the ADL5565 and also to balance the

linearity vs. input power of the ADC. The input impedance of

the AD9467 was reduced to 200 Ω by placing a 310 Ω resistor in

parallel with the ADC differential input.

Antialiasing Filter Design

An antialising filter ahead of the ADC helps reduce signal

content and noise from unwanted Nyquist zones that would

otherwise alias in band and degrade the dynamic performance.

Antialiasing filters are often designed using LC networks and

must have well defined source and load impedances to achieve

the desired stop-band and pass-band characteristics. The filter

design is accomplished using software available from Nuhertz

Technologies or Agilent Technologies Advanced Design

Systems (ADS), for example.

In the circuit in Figure 1, the ADS program was used to design

a fourth-order maximally flat (Butterworth) low-pass filter.

Figure 4 shows the low-pass filter design with a source and load

impedance of 200 Ω and a 3 dB cutoff frequency of 300 MHz.

The 200 Ω impedance was chosen because it is the common

source and load impedance of the driver amplifier and ADC.

The first elements are series inductors to ease driver requirements.

In the final optimized circuit of Figure 1, the filter source

impedance is equal to approximately 21.6 Ω; however, 200 Ω was

chosen to design the low-pass portion of the filter because the

overall filter is ultimately a resonant band-pass filter, and it is

more critical that the amplifier and ADC see the correct load and

source impedance for optimized linearity performance. The effect

of doing this is amplitude loss due to the impedance mismatch.

39nH

2pF

8.2pF

39nH

150nH

150nH

Figure 4. Low-Pass Filter Design

The low-pass filter design was further tuned by creating resonance

to cause peaking at the band of interest. This resulted in a

narrow-band, band-pass filter at a high IF. Placing an inductor

across the ADC differential inputs nulls the input capacitance of

the ADC and creates peaking. Figure 5 shows the calculation

used to determine the resonant inductor value. In the case of

the 3.5 pF source impedance of the AD9467, a parallel inductor

of 181 nH is necessary to null the capacitive susceptance; leaving

only the high impedance resistive portion of the RC parallel

equivalent. The resonant frequency chosen for the calculation

was 200 MHz.

Figure 5. Resonant Match

C

L

Y

Y

Z

Y

Z

Y

L

j

Z

C

j

Z

L

C

L

L

C

C

L

C

2

1

0

1

1

1

ω

ω

ω

=

=

+

=

=

=

=

Measured Performance

Figure 1 shows the final circuit configuration. The outputs of the

ADL5565 were padded with 5.6 Ω on each output to improve

the stability of the driver amplifier. The recommended series

resistance is generally between a few ohms to several tens of ohms.

A larger resistor value improves on stability; however, the tradeoff is

a power loss because the series resistor forms a voltage divider

with the impedance at the ADC inputs, resulting in signal

attenuation.

Following the series resistors at the output of the ADL5565 are

1 nF dc blocking capacitors. Following that is the antialiasing

filter and then the parallel resistor of 310 Ω to reduce the input

impedance of the ADC. Finally, the 15 Ω resistors in series with

the ADC inputs isolate the internal switching transients from

the filter and the amplifier.