EVM Stacking

3-3

EVM Operation

3.3

EVM Stacking

EVM stacking enables the designer to evaluate two DACx573s in tandem to

yield an eight-channel output. A maximum of two DACx573 EVMs are allowed

because the output terminal, J4, dictates the number of DAC channels that can

be connected without colliding. Table 3 - 2 shows how the DAC output

channels are mapped to the output terminal, J4, with respect to the jumper

positions of W2, W11, W12, and W13.

Table 3 - 2. DACx573 Output Channel Mapping

Reference

Jumper

Position

Function

W2

1-2

2-3

W11

1-2

2-3

W12

1-2

2-3

W13

1-2

2-3

This is accomplished by configuring address jumpers W7 and W8 (refer to the

The LDAC signal can be shared to have a synchronous DAC-output update

and can be hardware-driven by GPIO0. If software control of the LDAC is

desired, the GPIO0 signal must be set low through software or J2-pin 2 can

be strapped to DGND.

3.4

Output Op Amp

The EVM includes an optional signal conditioning circuit for the DAC output

through an external operational amplifier, U2. Only one DAC output channel

can be monitored at any given time because the odd numbered pins (J4 - 1 to

J4 - 7) are tied together. The output op amp gain is configured at two by default.

The unbuffered outputs of the DAC can be probed through the even pins of J4,

the output terminal, which also provides mechanical stability when stacking or

plugging into an interface board. J4 also provides easy access for monitoring

up to eight DAC channels when stacking two EVMs together, as described in

section 3.3.

The following sections describe various configurations of the output amplifier,

U2.