For more information about the MPC5554 or the MPC55xx family,

Freescale, the Freescale logo and Qorivva are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off.

The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks

and service marks licensed by Power.org. All other product or service names are the property of their respective owners.

© 2005, 2008, 2010, 2012 Freescale Semiconductor, Inc.

Document Number: MPC5554FAMFS REV 3

The e200z6 Core

• High-performance132MHz32-bit

BookE-compliantcorebuiltonPower

Architecturetechnology

• Memorymanagementunit(MMU)with

32-entryfullyassociativetranslation

lookasidebuffer

• Signalprocessingextension(SPE):DSP,

SIMDandfloatingpointcapabilities

Memory

• 2MBofembeddedflashmemorywith

errorcorrectioncoding(ECC)andread

whilewritecapability

• 64KBon-chipstaticRAMwithECC

• 32KBofcache(withlinelocking)thatcan

beconfiguredasadditionalRAM

System

• Twoenhancedtimeprocessorunits

(eTPUs)with64input/output(I/O)channels

and19KBofdesignatedSRAM

• 64-ch.enhanceddirectmemoryaccess

controller

• Interruptcontrollercapableofhandling308

selectable-priorityinterruptsources

• Frequencymodulatedphase-lockedloop

toassistinelectromagneticinterference

management

• MPC500-compatibleexternalbusinterface

• NexusIEEE-ISTO5001™Class3+

multicoredebugcapabilities

• 5/3.3VIO,5VADC,3.3/1.8Vbus,

1.5Vcore

• 416-pinPBGApackage

• Temperaturerange:–40ºCto+125ºC

• Optionaltemperaturerange:–55ºCto

+125ºC

Input/Output

• 40-ch.dualenhancedqueuedanalog-

to-digitalconverter(eQADC)—upto

12-bitresolutionandupto1.25ms

conversions,sixqueueswithtriggering

andDMAsupport

• Fourdeserialserialperipheralinterface

(DSPI)modules—16bitswideuptosix

chipselectseach

• Threecontrollerareanetwork(CAN)

moduleswith64bufferseach

• Twoenhancedserialcommunication

interface(eSCI)modules

• 24-ch.enhancedmultipleI/Osystem

(EMIOS)withunifiedchannels

Benefits

Excellent System Performance

BookEsuperscalarcompliantwiththePower

ArchitecturecoreincludesintegratedDSP

featuresandupgradedinterruptcontrol.

Cost Effectiveness

Integratesmorefunctionalityonchip.

Functionspreviouslyperformedinexternal

analoghardwarehavebeenmoved

intosoftware.

Flexibility

Supportsmultipleprotocolsandcustomer

requirementsthroughintelligentsubsystems.

Scalability and Compatibility

Core-andplatform-basedarchitecture

enablessimplederivativedevelopment.

Leveragespastengineeringinvestmentsand

existingknowledgeofPowerArchitecture

technologytocreateasolidmigrationpathfor

MPC500users.

Ease of Use

5Vinterfacestoallowuseoflegacysensor

andI/Osystems.

Development Support

Acomprehensivesuiteofhardware

andsoftwaredevelopmenttoolsforthe

QorivvaMPC5554MCUisavailableto

helpsimplifyandspeedsystemdesign.

Developmentsupportisavailablethrough

leadingindependenttoolvendors,

providingcompilers,debuggers,simulation

environments,aswellasmoreadvancedor

specificdevelopmenttools.Inadditiontothe

standardevaluationkitthatcomeswiththe

CodeWarriorcompileroffering,GreenHills

SoftwareandiSYSTEMbothprovideindividual

evaluationkitstoofferauniquelycateredout-

of-boxexperience.

Committedtoyouforthelongrun,Freescale

understandsyourtoppriority:designhigher

performanceproductsinlesstimeandata

reducedtotalcost.TheQorivvaMPC55xx

familyenablesyoutobuyasmuch,oraslittle

performanceasyouneedtohelpmeetyour

productdevelopmentgoals.Itsmigration

pathfromtheMPC500familymeanstime

andresourcesalreadyinvestedinthePower

Architectureinstructionsetarchitecturewon’t

bewasted.