OP490

Rev. E | Page 12 of 16

1/4

OP490

A

1/4

OP490

B

1/4

OP490

D

1/4

OP490

C

R4

50

Ω

R8

50

Ω

7

6

5

1

4

11

2

3

13

12

9

8

10

14

R7

50

Ω

R6

5k

Ω

R3

50

Ω

R2

9k

Ω

R5

5k

Ω

R1

1k

Ω

+15V

Figure 24. High Output Amplifier

HIGH OUTPUT AMPLIFIER

The amplifier shown in Figure 24 is capable of driving 25 V p-p

into a 1 kΩ load. Design of the amplifier is based on a bridge

configuration. A amplifies the input signal and drives the load

with the help of B. Amplifier C is a unity-gain inverter which

drives the load with help from D. Gain of the high output

amplifier with the component values shown is 10, but can easily

be changed by varying R1 or R2.

SINGLE-SUPPLY MICROPOWER QUAD

PROGRAMMABLE GAIN AMPLIFIER

The combination of a quad OP490 and the DAC8408 quad 8-bit

CMOS DAC creates a quad programmable-gain amplifier with

a quiescent supply drain of only 140 μA. The digital code

present at the DAC, which is easily set by a microprocessor,

determines the ratio between the fixed DAC feedback resistor

and the resistance of the DAC ladder seen by the op amp feed-

back loop. The gain of each amplifier is:

n

V

V

IN

OUT

256

−

=

where n equals the decimal equivalent of the 8-bit digital code

present at the DAC. If the digital code present at the DAC

consists of all zeros, the feedback loop opens causing the op

amp output to saturate. The 10 MΩ resistors placed in parallel

with the DAC feedback loop eliminate this problem with a very

small reduction in gain accuracy. The 2.5 V reference biases the

amplifiers to the center of the linear region providing maximum

output swing.