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S12SCIV2D датащи(PDF) 65 Page - Freescale Semiconductor, Inc

номер детали S12SCIV2D
подробное описание детали  MC9S12DJ64 Device User GUide V01.17
PDF  126 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

S12SCIV2D датащи(HTML) 65 Page - Freescale Semiconductor, Inc

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MC9S12DJ64 Device User Guide — V01.17
65
Section 3 System Clock Description
3.1 Overview
The Clock and Reset Generator provides the internal clock signals for the HCS12 Core and all peripheral
modules. Figure 3-1 shows the clock connections from the CRG to all modules.
Consult the CRG Block User Guide and OSC Block User Guide for details on clock generation.
Figure 3-1 Clock Connections
CRG
Bus Clock
Core Clock
EXTAL
XTAL
Oscillator Clock
HCS12 CORE
IIC
RAM
SCI0, SCI1
PWM
ATD0, 1
EEPROM
Flash
ECT
BDLC
SPI0
CAN0
PIM
BDM
OSC
CPU
MEBI
MMC
INT
BKP



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